
Abbigale A. Boyle
Examiner (ID: 6386, Phone: (571)270-7919 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2899, 2891, 2816 |
| Total Applications | 419 |
| Issued Applications | 231 |
| Pending Applications | 66 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 10479428
[patent_doc_number] => 20150364446
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-12-17
[patent_title] => 'Semiconductor Chip Assembly and Method for Manufacturing the Same'
[patent_app_type] => utility
[patent_app_number] => 14/763898
[patent_app_country] => US
[patent_app_date] => 2014-01-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2283
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14763898
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/763898 | Semiconductor chip assembly and method for manufacturing the same | Jan 21, 2014 | Issued |
Array
(
[id] => 12214881
[patent_doc_number] => 09911696
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-03-06
[patent_title] => 'Packaged semiconductor assemblies and methods for manufacturing such assemblies'
[patent_app_type] => utility
[patent_app_number] => 14/152622
[patent_app_country] => US
[patent_app_date] => 2014-01-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 19
[patent_no_of_words] => 8074
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 231
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14152622
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/152622 | Packaged semiconductor assemblies and methods for manufacturing such assemblies | Jan 9, 2014 | Issued |
Array
(
[id] => 10168635
[patent_doc_number] => 09199329
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-01
[patent_title] => 'MIG- or MAG-welding gun'
[patent_app_type] => utility
[patent_app_number] => 14/091025
[patent_app_country] => US
[patent_app_date] => 2013-11-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 4
[patent_no_of_words] => 1366
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091025
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/091025 | MIG- or MAG-welding gun | Nov 25, 2013 | Issued |
Array
(
[id] => 10624411
[patent_doc_number] => 09343361
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-05-17
[patent_title] => 'Semiconductor device, fabricating method thereof and semiconductor package including the semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 14/072777
[patent_app_country] => US
[patent_app_date] => 2013-11-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 10945
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 135
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14072777
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/072777 | Semiconductor device, fabricating method thereof and semiconductor package including the semiconductor device | Nov 4, 2013 | Issued |
Array
(
[id] => 10004137
[patent_doc_number] => 09048234
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Off-chip vias in stacked chips'
[patent_app_type] => utility
[patent_app_number] => 13/914896
[patent_app_country] => US
[patent_app_date] => 2013-06-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 26
[patent_no_of_words] => 6817
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 238
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13914896
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/914896 | Off-chip vias in stacked chips | Jun 10, 2013 | Issued |
Array
(
[id] => 10260147
[patent_doc_number] => 20150145144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2015-05-28
[patent_title] => 'USE OF A CONFORMAL COATING ELASTIC CUSHION TO REDUCE THROUGH SILICON VIAS (TSV) STRESS IN 3-DIMENSIONAL INTEGRATION'
[patent_app_type] => utility
[patent_app_number] => 14/402423
[patent_app_country] => US
[patent_app_date] => 2013-06-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 31
[patent_no_of_words] => 7845
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14402423
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/402423 | USE OF A CONFORMAL COATING ELASTIC CUSHION TO REDUCE THROUGH SILICON VIAS (TSV) STRESS IN 3-DIMENSIONAL INTEGRATION | Jun 5, 2013 | Abandoned |
Array
(
[id] => 13085101
[patent_doc_number] => 10062623
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-08-28
[patent_title] => Semiconductor package substrate, package system using the same and method for manufacturing thereof
[patent_app_type] => utility
[patent_app_number] => 14/401602
[patent_app_country] => US
[patent_app_date] => 2013-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 26
[patent_no_of_words] => 6880
[patent_no_of_claims] => 3
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 366
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14401602
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/401602 | Semiconductor package substrate, package system using the same and method for manufacturing thereof | May 23, 2013 | Issued |
Array
(
[id] => 11811507
[patent_doc_number] => 09716081
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-07-25
[patent_title] => 'Assembly of wafer stacks'
[patent_app_type] => utility
[patent_app_number] => 14/401606
[patent_app_country] => US
[patent_app_date] => 2013-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 18
[patent_no_of_words] => 5565
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 180
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14401606
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/401606 | Assembly of wafer stacks | May 14, 2013 | Issued |
Array
(
[id] => 9054668
[patent_doc_number] => 20130252382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-26
[patent_title] => 'METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/893937
[patent_app_country] => US
[patent_app_date] => 2013-05-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 4674
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13893937
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/893937 | Method of manufacturing a semiconductor device | May 13, 2013 | Issued |
Array
(
[id] => 11321597
[patent_doc_number] => 09520344
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-12-13
[patent_title] => 'Semiconductor module for electric power'
[patent_app_type] => utility
[patent_app_number] => 14/401556
[patent_app_country] => US
[patent_app_date] => 2013-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 34
[patent_no_of_words] => 18487
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 368
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14401556
[rel_patent_id] =>[rel_patent_doc_number] =>) 14/401556 | Semiconductor module for electric power | May 6, 2013 | Issued |
Array
(
[id] => 12498438
[patent_doc_number] => 09997440
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2018-06-12
[patent_title] => Protection layer for adhesive material at wafer edge
[patent_app_type] => utility
[patent_app_number] => 13/864676
[patent_app_country] => US
[patent_app_date] => 2013-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 11
[patent_no_of_words] => 2735
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13864676
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/864676 | Protection layer for adhesive material at wafer edge | Apr 16, 2013 | Issued |
Array
(
[id] => 10624477
[patent_doc_number] => 09343426
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2016-05-17
[patent_title] => 'Use of device assembly for a generalization of three-dimensional metal interconnect technologies'
[patent_app_type] => utility
[patent_app_number] => 13/735821
[patent_app_country] => US
[patent_app_date] => 2013-01-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 12064
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 300
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13735821
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/735821 | Use of device assembly for a generalization of three-dimensional metal interconnect technologies | Jan 6, 2013 | Issued |
Array
(
[id] => 10557127
[patent_doc_number] => 09281332
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-03-08
[patent_title] => 'Package process of backside illumination image sensor'
[patent_app_type] => utility
[patent_app_number] => 13/668245
[patent_app_country] => US
[patent_app_date] => 2012-11-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 9
[patent_no_of_words] => 3166
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 253
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13668245
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/668245 | Package process of backside illumination image sensor | Nov 2, 2012 | Issued |
Array
(
[id] => 9266613
[patent_doc_number] => 20140021529
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-01-23
[patent_title] => 'FLASH MEMORY DEVICE WITH WORD LINES OF UNIFORM WIDTH AND METHOD FOR MANUFACTURING THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/657047
[patent_app_country] => US
[patent_app_date] => 2012-10-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5302
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13657047
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/657047 | FLASH MEMORY DEVICE WITH WORD LINES OF UNIFORM WIDTH AND METHOD FOR MANUFACTURING THEREOF | Oct 21, 2012 | Abandoned |
Array
(
[id] => 8634806
[patent_doc_number] => 20130026609
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-01-31
[patent_title] => 'PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE WITH STRESS RELIEF STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/648114
[patent_app_country] => US
[patent_app_date] => 2012-10-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 13675
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13648114
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/648114 | PACKAGE ASSEMBLY INCLUDING A SEMICONDUCTOR SUBSTRATE WITH STRESS RELIEF STRUCTURE | Oct 8, 2012 | Abandoned |
Array
(
[id] => 9360543
[patent_doc_number] => 20140070415
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2014-03-13
[patent_title] => 'MICROELECTRONIC PACKAGES HAVING TRENCH VIAS AND METHODS FOR THE MANUFACTURE THEREOF'
[patent_app_type] => utility
[patent_app_number] => 13/610488
[patent_app_country] => US
[patent_app_date] => 2012-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 7323
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610488
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/610488 | Microelectronic packages having trench vias and methods for the manufacture thereof | Sep 10, 2012 | Issued |
Array
(
[id] => 11524450
[patent_doc_number] => 09607862
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-28
[patent_title] => 'Extrusion-resistant solder interconnect structures and methods of forming'
[patent_app_type] => utility
[patent_app_number] => 13/610262
[patent_app_country] => US
[patent_app_date] => 2012-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 3142
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13610262
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/610262 | Extrusion-resistant solder interconnect structures and methods of forming | Sep 10, 2012 | Issued |
Array
(
[id] => 9031683
[patent_doc_number] => 20130234321
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-09-12
[patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/609053
[patent_app_country] => US
[patent_app_date] => 2012-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4089
[patent_no_of_claims] => 31
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13609053
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/609053 | SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME | Sep 9, 2012 | Abandoned |
Array
(
[id] => 10590590
[patent_doc_number] => 09312210
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2016-04-12
[patent_title] => 'Semiconductor device with air gap and method for fabricating the same'
[patent_app_type] => utility
[patent_app_number] => 13/606648
[patent_app_country] => US
[patent_app_date] => 2012-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 23
[patent_no_of_words] => 8727
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 80
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13606648
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/606648 | Semiconductor device with air gap and method for fabricating the same | Sep 6, 2012 | Issued |
Array
(
[id] => 8718014
[patent_doc_number] => 20130069230
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-21
[patent_title] => 'ELECTRONIC ASSEMBLY APPARATUS AND ASSOCIATED METHODS'
[patent_app_type] => utility
[patent_app_number] => 13/607460
[patent_app_country] => US
[patent_app_date] => 2012-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 9188
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13607460
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/607460 | ELECTRONIC ASSEMBLY APPARATUS AND ASSOCIATED METHODS | Sep 6, 2012 | Abandoned |