Search

Abbigale A. Boyle

Examiner (ID: 6386, Phone: (571)270-7919 , Office: P/2816 )

Most Active Art Unit
2816
Art Unit(s)
2899, 2891, 2816
Total Applications
419
Issued Applications
231
Pending Applications
66
Abandoned Applications
139

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10617688 [patent_doc_number] => 09337138 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-05-10 [patent_title] => 'Capacitors within an interposer coupled to supply and ground planes of a substrate' [patent_app_type] => utility [patent_app_number] => 13/416640 [patent_app_country] => US [patent_app_date] => 2012-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6564 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13416640 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/416640
Capacitors within an interposer coupled to supply and ground planes of a substrate Mar 8, 2012 Issued
Array ( [id] => 8713796 [patent_doc_number] => 08399938 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-03-19 [patent_title] => 'Stressed Fin-FET devices with low contact resistance' [patent_app_type] => utility [patent_app_number] => 13/405296 [patent_app_country] => US [patent_app_date] => 2012-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 4237 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13405296 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/405296
Stressed Fin-FET devices with low contact resistance Feb 24, 2012 Issued
Array ( [id] => 8333249 [patent_doc_number] => 20120199961 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SEMICONDUCTOR PACKAGES HAVING LEAD FRAMES' [patent_app_type] => utility [patent_app_number] => 13/367610 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 7706 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367610 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367610
SEMICONDUCTOR PACKAGES HAVING LEAD FRAMES Feb 6, 2012 Abandoned
Array ( [id] => 8777413 [patent_doc_number] => 20130099388 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'STACKED SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/367918 [patent_app_country] => US [patent_app_date] => 2012-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13367918 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/367918
Stacked semiconductor package Feb 6, 2012 Issued
Array ( [id] => 8344895 [patent_doc_number] => 20120205811 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINAL LOCKS AND METHOD OF MANUFACTURE THEREOF' [patent_app_type] => utility [patent_app_number] => 13/366768 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5210 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366768 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366768
INTEGRATED CIRCUIT PACKAGING SYSTEM WITH TERMINAL LOCKS AND METHOD OF MANUFACTURE THEREOF Feb 5, 2012 Abandoned
Array ( [id] => 8356730 [patent_doc_number] => 20120211895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'CHIP MODULE AND METHOD FOR PROVIDING A CHIP MODULE' [patent_app_type] => utility [patent_app_number] => 13/366607 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 3014 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366607 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366607
CHIP MODULE AND METHOD FOR PROVIDING A CHIP MODULE Feb 5, 2012 Abandoned
Array ( [id] => 8680914 [patent_doc_number] => 20130049198 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-02-28 [patent_title] => 'SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/366367 [patent_app_country] => US [patent_app_date] => 2012-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3294 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13366367 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/366367
SEMICONDUCTOR PACKAGE STRUCTURE AND MANUFACTURING METHOD THEREOF Feb 5, 2012 Abandoned
Array ( [id] => 8333274 [patent_doc_number] => 20120199982 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/365772 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5539 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365772 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365772
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Feb 2, 2012 Abandoned
Array ( [id] => 8499770 [patent_doc_number] => 20120299178 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-11-29 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/365302 [patent_app_country] => US [patent_app_date] => 2012-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2828 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13365302 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/365302
SEMICONDUCTOR DEVICE Feb 2, 2012 Abandoned
Array ( [id] => 8344899 [patent_doc_number] => 20120205820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-16 [patent_title] => 'ENCAPSULATING RESIN SHEET AND SEMICONDUCTOR DEVICE USING THE SAME, AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/364592 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5794 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364592 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364592
ENCAPSULATING RESIN SHEET AND SEMICONDUCTOR DEVICE USING THE SAME, AND MANUFACTURING METHOD FOR THE SEMICONDUCTOR DEVICE Feb 1, 2012 Abandoned
Array ( [id] => 8333284 [patent_doc_number] => 20120199981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-09 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/364678 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 8645 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364678 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364678
SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SEMICONDUCTOR DEVICE Feb 1, 2012 Abandoned
Array ( [id] => 8356737 [patent_doc_number] => 20120211890 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-23 [patent_title] => 'METHOD FOR FORMING METAL THIN FILM, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 13/364722 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 12537 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364722 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364722
METHOD FOR FORMING METAL THIN FILM, SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Feb 1, 2012 Abandoned
Array ( [id] => 8960917 [patent_doc_number] => 20130200519 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-08 [patent_title] => 'Through silicon via structure and method of fabricating the same' [patent_app_type] => utility [patent_app_number] => 13/364331 [patent_app_country] => US [patent_app_date] => 2012-02-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2385 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13364331 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/364331
Through silicon via structure and method of fabricating the same Feb 1, 2012 Abandoned
Array ( [id] => 8321395 [patent_doc_number] => 20120193803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND DISPLAY' [patent_app_type] => utility [patent_app_number] => 13/363954 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6657 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363954 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/363954
SEMICONDUCTOR DEVICE, METHOD FOR PRODUCING SEMICONDUCTOR DEVICE, AND DISPLAY Jan 31, 2012 Abandoned
Array ( [id] => 8321404 [patent_doc_number] => 20120193813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'WIRING STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE WIRING STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/363407 [patent_app_country] => US [patent_app_date] => 2012-02-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3678 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13363407 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/363407
WIRING STRUCTURE OF SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE WIRING STRUCTURE Jan 31, 2012 Abandoned
Array ( [id] => 8947789 [patent_doc_number] => 20130193569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-01 [patent_title] => 'Integrated Circuit Die And Method Of Fabricating' [patent_app_type] => utility [patent_app_number] => 13/362871 [patent_app_country] => US [patent_app_date] => 2012-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2869 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13362871 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/362871
Integrated Circuit Die And Method Of Fabricating Jan 30, 2012 Abandoned
Array ( [id] => 8299126 [patent_doc_number] => 20120181683 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'THREE-DIMENSIONALLY INTEGRATED SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCORPORATION BY REFERENCE' [patent_app_type] => utility [patent_app_number] => 13/351409 [patent_app_country] => US [patent_app_date] => 2012-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 10684 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13351409 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/351409
THREE-DIMENSIONALLY INTEGRATED SEMICONDUCTOR DEVICE AND ELECTRONIC DEVICE INCORPORATION BY REFERENCE Jan 16, 2012 Abandoned
Array ( [id] => 8146603 [patent_doc_number] => 08163603 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-24 [patent_title] => 'Method of making a semiconductor chip assembly with a post/base heat spreader and a substrate using grinding' [patent_app_type] => utility [patent_app_number] => 13/300657 [patent_app_country] => US [patent_app_date] => 2011-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 45 [patent_no_of_words] => 19561 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 321 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/163/08163603.pdf [firstpage_image] =>[orig_patent_app_number] => 13300657 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/300657
Method of making a semiconductor chip assembly with a post/base heat spreader and a substrate using grinding Nov 20, 2011 Issued
Array ( [id] => 8818483 [patent_doc_number] => 20130119529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-05-16 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING LID STRUCTURE AND METHOD OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 13/296649 [patent_app_country] => US [patent_app_date] => 2011-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2450 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13296649 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/296649
SEMICONDUCTOR DEVICE HAVING LID STRUCTURE AND METHOD OF MAKING SAME Nov 14, 2011 Abandoned
Array ( [id] => 8224894 [patent_doc_number] => 20120139097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-06-07 [patent_title] => 'SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/243806 [patent_app_country] => US [patent_app_date] => 2011-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 25 [patent_no_of_words] => 6944 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13243806 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/243806
SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SAME Sep 22, 2011 Abandoned
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