
Abbigale A. Boyle
Examiner (ID: 6386, Phone: (571)270-7919 , Office: P/2816 )
| Most Active Art Unit | 2816 |
| Art Unit(s) | 2899, 2891, 2816 |
| Total Applications | 419 |
| Issued Applications | 231 |
| Pending Applications | 66 |
| Abandoned Applications | 139 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 16226235
[patent_doc_number] => 20200251352
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-06
[patent_title] => Quad Flat No Lead Package And Method Of Making
[patent_app_type] => utility
[patent_app_number] => 16/853186
[patent_app_country] => US
[patent_app_date] => 2020-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2332
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16853186
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/853186 | Quad flat no lead package and method of making | Apr 19, 2020 | Issued |
Array
(
[id] => 19183784
[patent_doc_number] => 11990384
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-21
[patent_title] => Amplifier modules with power transistor die and peripheral ground connections
[patent_app_type] => utility
[patent_app_number] => 16/852064
[patent_app_country] => US
[patent_app_date] => 2020-04-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 14
[patent_no_of_words] => 10894
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 306
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16852064
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/852064 | Amplifier modules with power transistor die and peripheral ground connections | Apr 16, 2020 | Issued |
Array
(
[id] => 16210454
[patent_doc_number] => 20200243444
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-30
[patent_title] => PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES
[patent_app_type] => utility
[patent_app_number] => 16/847489
[patent_app_country] => US
[patent_app_date] => 2020-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7691
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16847489
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/847489 | PACKAGED SEMICONDUCTOR ASSEMBLIES AND METHODS FOR MANUFACTURING SUCH ASSEMBLIES | Apr 12, 2020 | Abandoned |
Array
(
[id] => 17395856
[patent_doc_number] => 11244880
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-02-08
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/839635
[patent_app_country] => US
[patent_app_date] => 2020-04-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 14
[patent_figures_cnt] => 28
[patent_no_of_words] => 8959
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16839635
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/839635 | Semiconductor device | Apr 2, 2020 | Issued |
Array
(
[id] => 17115597
[patent_doc_number] => 20210296194
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-23
[patent_title] => MOLDED SEMICONDUCTOR CHIP PACKAGE WITH STAIR-STEP MOLDING LAYER
[patent_app_type] => utility
[patent_app_number] => 16/822353
[patent_app_country] => US
[patent_app_date] => 2020-03-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7358
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -25
[patent_words_short_claim] => 58
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16822353
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/822353 | Molded semiconductor chip package with stair-step molding layer | Mar 17, 2020 | Issued |
Array
(
[id] => 16332307
[patent_doc_number] => 20200303273
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-09-24
[patent_title] => POWER MODULE
[patent_app_type] => utility
[patent_app_number] => 16/812436
[patent_app_country] => US
[patent_app_date] => 2020-03-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5118
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16812436
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/812436 | POWER MODULE | Mar 8, 2020 | Abandoned |
Array
(
[id] => 17085500
[patent_doc_number] => 20210280507
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-09
[patent_title] => PACKAGE COMPRISING DUMMY INTERCONNECTS
[patent_app_type] => utility
[patent_app_number] => 16/810589
[patent_app_country] => US
[patent_app_date] => 2020-03-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7955
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -20
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16810589
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/810589 | PACKAGE COMPRISING DUMMY INTERCONNECTS | Mar 4, 2020 | Pending |
Array
(
[id] => 17615749
[patent_doc_number] => 20220158029
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-19
[patent_title] => SUBSTRATE AND LIGHT EMITTING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 17/434693
[patent_app_country] => US
[patent_app_date] => 2020-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20581
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17434693
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/434693 | SUBSTRATE AND LIGHT EMITTING ELEMENT | Feb 26, 2020 | Abandoned |
Array
(
[id] => 17404739
[patent_doc_number] => 20220046830
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-10
[patent_title] => ELECTRONIC CONVERTER DESIGNED ON THE BASIS OF WELDING TECHNOLOGIES
[patent_app_type] => utility
[patent_app_number] => 17/435547
[patent_app_country] => US
[patent_app_date] => 2020-02-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3368
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -4
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17435547
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/435547 | ELECTRONIC CONVERTER DESIGNED ON THE BASIS OF WELDING TECHNOLOGIES | Feb 26, 2020 | Pending |
Array
(
[id] => 17010937
[patent_doc_number] => 20210242098
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => VARIABLE THICKNESS LID ADHESIVE
[patent_app_type] => utility
[patent_app_number] => 16/779971
[patent_app_country] => US
[patent_app_date] => 2020-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6705
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16779971
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/779971 | VARIABLE THICKNESS LID ADHESIVE | Feb 2, 2020 | Abandoned |
Array
(
[id] => 15906031
[patent_doc_number] => 20200152536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => ELECTRONIC COMPONENT
[patent_app_type] => utility
[patent_app_number] => 16/744449
[patent_app_country] => US
[patent_app_date] => 2020-01-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4737
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16744449
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/744449 | Electronic component | Jan 15, 2020 | Issued |
Array
(
[id] => 16119861
[patent_doc_number] => 20200211953
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-07-02
[patent_title] => LEADFRAME WITH A METAL OXIDE COATING AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/726070
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4785
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16726070
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/726070 | Leadframe with a metal oxide coating and method of forming the same | Dec 22, 2019 | Issued |
Array
(
[id] => 15840737
[patent_doc_number] => 20200135651
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-30
[patent_title] => PACKAGE STRUCTURE WITH BUMP
[patent_app_type] => utility
[patent_app_number] => 16/725321
[patent_app_country] => US
[patent_app_date] => 2019-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7155
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16725321
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/725321 | Package structure with bump | Dec 22, 2019 | Issued |
Array
(
[id] => 16888958
[patent_doc_number] => 20210175155
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => POWER MODULE HAVING INTERCONNECTED BASE PLATE WITH MOLDED METAL AND METHOD OF MAKING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/705898
[patent_app_country] => US
[patent_app_date] => 2019-12-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3353
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 147
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16705898
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/705898 | POWER MODULE HAVING INTERCONNECTED BASE PLATE WITH MOLDED METAL AND METHOD OF MAKING THE SAME | Dec 5, 2019 | Pending |
Array
(
[id] => 16888941
[patent_doc_number] => 20210175138
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-10
[patent_title] => Semiconductors Having Die Pads with Environmental Protection and Process of Making Semiconductors Having Die Pads with Environmental Protection
[patent_app_type] => utility
[patent_app_number] => 16/704644
[patent_app_country] => US
[patent_app_date] => 2019-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13754
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16704644
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/704644 | Semiconductors Having Die Pads with Environmental Protection and Process of Making Semiconductors Having Die Pads with Environmental Protection | Dec 4, 2019 | Pending |
Array
(
[id] => 17559126
[patent_doc_number] => 11315848
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-26
[patent_title] => Semiconductor device and method of manufacturing semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/703037
[patent_app_country] => US
[patent_app_date] => 2019-12-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 40
[patent_figures_cnt] => 52
[patent_no_of_words] => 19504
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16703037
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/703037 | Semiconductor device and method of manufacturing semiconductor device | Dec 3, 2019 | Issued |
Array
(
[id] => 16020915
[patent_doc_number] => 20200185301
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => Semiconductor Package, Metal Sheet for Use in a Semiconductor Package, and Method for Producing a Semiconductor Package
[patent_app_type] => utility
[patent_app_number] => 16/701251
[patent_app_country] => US
[patent_app_date] => 2019-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5626
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701251
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/701251 | Semiconductor package, metal sheet for use in a semiconductor package, and method for producing a semiconductor package | Dec 2, 2019 | Issued |
Array
(
[id] => 17210709
[patent_doc_number] => 11171086
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2021-11-09
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 16/700485
[patent_app_country] => US
[patent_app_date] => 2019-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8050
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 243
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700485
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/700485 | Semiconductor device | Dec 1, 2019 | Issued |
Array
(
[id] => 18235983
[patent_doc_number] => 11600547
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-03-07
[patent_title] => Semiconductor package with expanded heat spreader
[patent_app_type] => utility
[patent_app_number] => 16/700361
[patent_app_country] => US
[patent_app_date] => 2019-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 33
[patent_no_of_words] => 6917
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 160
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700361
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/700361 | Semiconductor package with expanded heat spreader | Dec 1, 2019 | Issued |
Array
(
[id] => 18507573
[patent_doc_number] => 11705400
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-07-18
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 16/699265
[patent_app_country] => US
[patent_app_date] => 2019-11-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 8053
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 235
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16699265
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/699265 | Semiconductor package | Nov 28, 2019 | Issued |