Abdelmoniem I. Elamin

Array ( [id] => 9571677 [patent_doc_number] => 20140189390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'SYSTEM AND METHOD FOR CAUSING REDUCED POWER CONSUMPTION ASSOCIATED WITH THERMAL REMEDIATION' [patent_app_type] => utility [patent_app_number] => 13/730386 [patent_app_country] => US [patent_app_date] => 2012-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8391 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13730386 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563842 [patent_doc_number] => 20140181555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'MANAGING A POWER STATE OF A PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/724594 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8615 [patent_no_of_claims] => 34 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724594 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563841 [patent_doc_number] => 20140181554 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'POWER CONTROL FOR MULTI-CORE DATA PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/724133 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4315 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724133 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563776 [patent_doc_number] => 20140181490 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'BOOT FROM MODIFIED IMAGE' [patent_app_type] => utility [patent_app_number] => 13/724193 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3628 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724193 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563831 [patent_doc_number] => 20140181544 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'Reducing Power Consumption of a Redundant Power System Utilizing Sleep Power Consumption Considerations for Power Supply Units Within the Redundant Power System' [patent_app_type] => utility [patent_app_number] => 13/724270 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 8321 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563824 [patent_doc_number] => 20140181537 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'GUARDBAND REDUCTION FOR MULTI-CORE DATA PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/724271 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5424 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724271 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10072314 [patent_doc_number] => 09110671 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Idle phase exit prediction' [patent_app_type] => utility [patent_app_number] => 13/724599 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8424 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724599 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9563839 [patent_doc_number] => 20140181553 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-26 [patent_title] => 'Idle Phase Prediction For Integrated Circuits' [patent_app_type] => utility [patent_app_number] => 13/723868 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 8850 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13723868 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10609637 [patent_doc_number] => 09329666 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-03 [patent_title] => 'Power throttling queue' [patent_app_type] => utility [patent_app_number] => 13/724583 [patent_app_country] => US [patent_app_date] => 2012-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 3371 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13724583 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9398501 [patent_doc_number] => 20140095907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-04-03 [patent_title] => 'Method of Conserving Power Based on Electronic Device\'s I/O Pattern' [patent_app_type] => utility [patent_app_number] => 13/715076 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3834 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715076 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8918074 [patent_doc_number] => 20130179699 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-07-11 [patent_title] => 'POWER CONTROL APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/715467 [patent_app_country] => US [patent_app_date] => 2012-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7104 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13715467 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10040813 [patent_doc_number] => 09081518 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-14 [patent_title] => 'Information processor and control method of the same' [patent_app_type] => utility [patent_app_number] => 13/713382 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 12092 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 147 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13713382 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9548664 [patent_doc_number] => 20140173312 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'DYNAMIC RE-CONFIGURATION FOR LOW POWER IN A DATA PROCESSOR' [patent_app_type] => utility [patent_app_number] => 13/714011 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3717 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714011 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9947577 [patent_doc_number] => 08996905 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-03-31 [patent_title] => 'Pulse generation circuit, burst order control circuit, and data output circuit' [patent_app_type] => utility [patent_app_number] => 13/714343 [patent_app_country] => US [patent_app_date] => 2012-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10652 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13714343 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9540147 [patent_doc_number] => 20140164794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'SEQUENTIAL POWER UP OF DEVICES IN A COMPUTING CLUSTER BASED ON RELATIVE COMMONALITY' [patent_app_type] => utility [patent_app_number] => 13/711778 [patent_app_country] => US [patent_app_date] => 2012-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6874 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13711778 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8781856 [patent_doc_number] => 20130103831 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-04-25 [patent_title] => 'ASSESSING CONDITIONS OF POWER CONSUMPTION IN COMPUTER NETWORK' [patent_app_type] => utility [patent_app_number] => 13/710876 [patent_app_country] => US [patent_app_date] => 2012-12-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9937 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13710876 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8855509 [patent_doc_number] => 20130145184 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-06-06 [patent_title] => 'ELECTRONIC APPARATUS AND IMAGE FORMING APPARATUS' [patent_app_type] => utility [patent_app_number] => 13/689010 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 22678 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689010 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10524155 [patent_doc_number] => 09250668 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-02 [patent_title] => 'Decoupled power and performance allocation in a multiprocessing system' [patent_app_type] => utility [patent_app_number] => 13/689232 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8356 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 126 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689232 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9513262 [patent_doc_number] => 20140149754 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-05-29 [patent_title] => 'GESTURE DETECTION MANAGEMENT FOR AN ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 13/689078 [patent_app_country] => US [patent_app_date] => 2012-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8836 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13689078 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 9332555 [patent_doc_number] => 20140059337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-02-27 [patent_title] => 'COMPUTING PERFORMANCE AND POWER MANAGEMENT WITH FIRMWARE PERFORMANCE DATA STRUCTURE' [patent_app_type] => utility [patent_app_number] => 13/977530 [patent_app_country] => US [patent_app_date] => 2012-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4263 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13977530 [rel_patent_id] =>[rel_patent_doc_number] =>)