Search

Abdou K. Seye

Examiner (ID: 18843, Phone: (571)270-1062 , Office: P/2194 )

Most Active Art Unit
2194
Art Unit(s)
2194, 2198
Total Applications
719
Issued Applications
568
Pending Applications
57
Abandoned Applications
114

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9096349 [patent_doc_number] => 20130275660 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-10-17 [patent_title] => 'MANAGING TRIM OPERATIONS IN A FLASH MEMORY SYSTEM' [patent_app_type] => utility [patent_app_number] => 13/860118 [patent_app_country] => US [patent_app_date] => 2013-04-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6218 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13860118 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/860118
System and method for managing trim operations in a flash memory system using mapping tables and block status tables Apr 9, 2013 Issued
Array ( [id] => 9137186 [patent_doc_number] => 20130297901 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-07 [patent_title] => 'MEMORY PROTECTION CIRCUIT, PROCESSING UNIT, AND MEMORY PROTECTION METHOD' [patent_app_type] => utility [patent_app_number] => 13/859261 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 15183 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13859261 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/859261
Memory protection circuit, method and processing unit utilizing memory access information register to selectively allow access to memory areas by virtual machines Apr 8, 2013 Issued
Array ( [id] => 9787633 [patent_doc_number] => 20140304453 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-10-09 [patent_title] => 'Effective Caching for Demand-based Flash Translation Layers in Large-Scale Flash Memory Storage Systems' [patent_app_type] => utility [patent_app_number] => 13/858105 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 10169 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858105 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858105
Effective Caching for Demand-based Flash Translation Layers in Large-Scale Flash Memory Storage Systems Apr 7, 2013 Abandoned
Array ( [id] => 9150439 [patent_doc_number] => 20130304962 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-11-14 [patent_title] => 'FIRMWARE CLEANUP DEVICE' [patent_app_type] => utility [patent_app_number] => 13/858095 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1043 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858095 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858095
FIRMWARE CLEANUP DEVICE Apr 7, 2013 Abandoned
Array ( [id] => 10530386 [patent_doc_number] => 09256522 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-02-09 [patent_title] => 'Method and system for generating soft-information after a single read in NAND flash using expected and measured values' [patent_app_type] => utility [patent_app_number] => 13/858781 [patent_app_country] => US [patent_app_date] => 2013-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6140 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 306 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13858781 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/858781
Method and system for generating soft-information after a single read in NAND flash using expected and measured values Apr 7, 2013 Issued
Array ( [id] => 11584656 [patent_doc_number] => 09639296 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-05-02 [patent_title] => 'Deallocating portions of data storage based on notifications of invalid data' [patent_app_type] => utility [patent_app_number] => 13/857968 [patent_app_country] => US [patent_app_date] => 2013-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10479 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 200 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13857968 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/857968
Deallocating portions of data storage based on notifications of invalid data Apr 4, 2013 Issued
Array ( [id] => 11523509 [patent_doc_number] => 09606909 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-03-28 [patent_title] => 'Deallocating portions of provisioned data storage based on defined bit patterns indicative of invalid data' [patent_app_type] => utility [patent_app_number] => 13/857967 [patent_app_country] => US [patent_app_date] => 2013-04-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 10481 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 259 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13857967 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/857967
Deallocating portions of provisioned data storage based on defined bit patterns indicative of invalid data Apr 4, 2013 Issued
Array ( [id] => 10708948 [patent_doc_number] => 20160055095 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-02-25 [patent_title] => 'STORING DATA FROM CACHE LINES TO MAIN MEMORY BASED ON MEMORY ADDRESSES' [patent_app_type] => utility [patent_app_number] => 14/780544 [patent_app_country] => US [patent_app_date] => 2013-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5606 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14780544 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/780544
STORING DATA FROM CACHE LINES TO MAIN MEMORY BASED ON MEMORY ADDRESSES Mar 27, 2013 Abandoned
Array ( [id] => 9933754 [patent_doc_number] => 20150081946 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-03-19 [patent_title] => 'METHOD OF IN-MEMORY MODIFICATION OF A DATA SET' [patent_app_type] => utility [patent_app_number] => 14/389886 [patent_app_country] => US [patent_app_date] => 2013-03-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3768 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14389886 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/389886
METHOD OF IN-MEMORY MODIFICATION OF A DATA SET Mar 18, 2013 Abandoned
Array ( [id] => 9745407 [patent_doc_number] => 20140281125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEMS AND METHODS FOR IN-PLACE REORGANIZATION OF DEVICE STORAGE' [patent_app_type] => utility [patent_app_number] => 13/827151 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7993 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827151
Systems and methods for in-place reorganization of device storage Mar 13, 2013 Issued
Array ( [id] => 9571497 [patent_doc_number] => 20140189210 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'MEMORY SYSTEM HAVING AN UNEQUAL NUMBER OF MEMORY DIE' [patent_app_type] => utility [patent_app_number] => 13/827499 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 21363 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827499 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827499
Memory system having an unequal number of memory die on different control channels Mar 13, 2013 Issued
Array ( [id] => 9056741 [patent_doc_number] => 20130254455 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-09-26 [patent_title] => 'SOLID STATE DRIVE INTERFACE CONTROLLER AND METHOD OF CONTROLLING SOLID STATE DRIVE INTERFACE' [patent_app_type] => utility [patent_app_number] => 13/827347 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 5904 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827347 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827347
Solid state drive interface controller and method selectively activating and deactivating interfaces and allocating storage capacity to the interfaces Mar 13, 2013 Issued
Array ( [id] => 9745407 [patent_doc_number] => 20140281125 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-18 [patent_title] => 'SYSTEMS AND METHODS FOR IN-PLACE REORGANIZATION OF DEVICE STORAGE' [patent_app_type] => utility [patent_app_number] => 13/827151 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7993 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827151 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827151
Systems and methods for in-place reorganization of device storage Mar 13, 2013 Issued
Array ( [id] => 11644897 [patent_doc_number] => 09666285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method and system for asynchronous die operations in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/826848 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 39 [patent_no_of_words] => 21336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826848
Method and system for asynchronous die operations in a non-volatile memory Mar 13, 2013 Issued
Array ( [id] => 11644897 [patent_doc_number] => 09666285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method and system for asynchronous die operations in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/826848 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 39 [patent_no_of_words] => 21336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826848
Method and system for asynchronous die operations in a non-volatile memory Mar 13, 2013 Issued
Array ( [id] => 9571492 [patent_doc_number] => 20140189205 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'METHOD AND SYSTEM FOR MANAGING PROGRAM CYCLES IN A MULTI-LAYER MEMORY' [patent_app_type] => utility [patent_app_number] => 13/826738 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 21461 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826738 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826738
Method and system for managing program cycles including maintenance programming operations in a multi-layer memory Mar 13, 2013 Issued
Array ( [id] => 11644897 [patent_doc_number] => 09666285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method and system for asynchronous die operations in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/826848 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 39 [patent_no_of_words] => 21336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826848
Method and system for asynchronous die operations in a non-volatile memory Mar 13, 2013 Issued
Array ( [id] => 11644897 [patent_doc_number] => 09666285 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-05-30 [patent_title] => 'Method and system for asynchronous die operations in a non-volatile memory' [patent_app_type] => utility [patent_app_number] => 13/826848 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 39 [patent_no_of_words] => 21336 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13826848 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/826848
Method and system for asynchronous die operations in a non-volatile memory Mar 13, 2013 Issued
Array ( [id] => 10616711 [patent_doc_number] => 09336156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Method and apparatus for cache line state update in sectored cache with line state tracker' [patent_app_type] => utility [patent_app_number] => 13/827271 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 14880 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827271 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827271
Method and apparatus for cache line state update in sectored cache with line state tracker Mar 13, 2013 Issued
Array ( [id] => 11239086 [patent_doc_number] => 09465731 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-11 [patent_title] => 'Multi-layer non-volatile memory system having multiple partitions in a layer' [patent_app_type] => utility [patent_app_number] => 13/827351 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 39 [patent_no_of_words] => 21156 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 229 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827351 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827351
Multi-layer non-volatile memory system having multiple partitions in a layer Mar 13, 2013 Issued
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