| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 8222857
[patent_doc_number] => 20120137060
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-05-31
[patent_title] => 'Multi-stage TCAM search'
[patent_app_type] => utility
[patent_app_number] => 13/137245
[patent_app_country] => US
[patent_app_date] => 2011-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 5106
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13137245
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/137245 | TCAM search unit including a distributor TCAM and DRAM and a method for dividing a database of TCAM rules | Jul 31, 2011 | Issued |
Array
(
[id] => 9829360
[patent_doc_number] => 08938598
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-01-20
[patent_title] => 'Facilitating simultaneous submission to a multi-producer queue by multiple threads with inner and outer pointers'
[patent_app_type] => utility
[patent_app_number] => 13/177340
[patent_app_country] => US
[patent_app_date] => 2011-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 13
[patent_no_of_words] => 10642
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 152
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13177340
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/177340 | Facilitating simultaneous submission to a multi-producer queue by multiple threads with inner and outer pointers | Jul 5, 2011 | Issued |
Array
(
[id] => 8479126
[patent_doc_number] => 20120278533
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-01
[patent_title] => 'SEMICONDUCTOR STORAGE APPARATUS AND METHOD FOR CONTROLLING SEMICONDUCTOR STORAGE APPARATUS'
[patent_app_type] => utility
[patent_app_number] => 13/130274
[patent_app_country] => US
[patent_app_date] => 2011-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 25
[patent_figures_cnt] => 25
[patent_no_of_words] => 20449
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13130274
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/130274 | Semiconductor storage apparatus and method including executing refresh in a flash memory based on a reliability period using degree of deterioration and read frequency | Apr 27, 2011 | Issued |
Array
(
[id] => 8443412
[patent_doc_number] => 20120260028
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-10-11
[patent_title] => 'SEMICONDUCTOR MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICES OF VARIOUS TYPES AND A CONTROL METHOD FOR THE SAME'
[patent_app_type] => utility
[patent_app_number] => 13/517295
[patent_app_country] => US
[patent_app_date] => 2011-01-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 8
[patent_no_of_words] => 3936
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13517295
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/517295 | SEMICONDUCTOR MEMORY SYSTEM HAVING SEMICONDUCTOR MEMORY DEVICES OF VARIOUS TYPES AND A CONTROL METHOD FOR THE SAME | Jan 11, 2011 | Abandoned |
Array
(
[id] => 9555597
[patent_doc_number] => 08762669
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-06-24
[patent_title] => 'Computer system and storage migration method utilizing acquired apparatus specific information as virtualization information'
[patent_app_type] => utility
[patent_app_number] => 12/996053
[patent_app_country] => US
[patent_app_date] => 2010-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 31
[patent_figures_cnt] => 33
[patent_no_of_words] => 20948
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 431
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12996053
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/996053 | Computer system and storage migration method utilizing acquired apparatus specific information as virtualization information | Nov 15, 2010 | Issued |
Array
(
[id] => 8130433
[patent_doc_number] => 20120089765
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-12
[patent_title] => 'METHOD FOR PERFORMING AUTOMATIC BOUNDARY ALIGNMENT AND RELATED NON-VOLATILE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/899555
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 2884
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0089/20120089765.pdf
[firstpage_image] =>[orig_patent_app_number] => 12899555
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899555 | METHOD FOR PERFORMING AUTOMATIC BOUNDARY ALIGNMENT AND RELATED NON-VOLATILE MEMORY DEVICE | Oct 6, 2010 | Abandoned |
Array
(
[id] => 7582241
[patent_doc_number] => 20110296124
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-01
[patent_title] => 'PARTITIONING MEMORY FOR ACCESS BY MULTIPLE REQUESTERS'
[patent_app_type] => utility
[patent_app_number] => 12/899681
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3781
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0296/20110296124.pdf
[firstpage_image] =>[orig_patent_app_number] => 12899681
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899681 | PARTITIONING MEMORY FOR ACCESS BY MULTIPLE REQUESTERS | Oct 6, 2010 | Abandoned |
Array
(
[id] => 10901402
[patent_doc_number] => 08924646
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-12-30
[patent_title] => 'Methods for managing data movement and destaging data in a multi-level cache system utilizing threshold values and metadata'
[patent_app_type] => utility
[patent_app_number] => 12/899746
[patent_app_country] => US
[patent_app_date] => 2010-10-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 4112
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12899746
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/899746 | Methods for managing data movement and destaging data in a multi-level cache system utilizing threshold values and metadata | Oct 6, 2010 | Issued |
Array
(
[id] => 6204012
[patent_doc_number] => 20110066798
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-17
[patent_title] => 'Semiconductor device having calibration circuit that adjusts an impedance of output buffer and data processing system including the same'
[patent_app_type] => utility
[patent_app_number] => 12/923261
[patent_app_country] => US
[patent_app_date] => 2010-09-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 10746
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0066/20110066798.pdf
[firstpage_image] =>[orig_patent_app_number] => 12923261
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/923261 | Semiconductor device having a memory and calibration circuit that selectively adjusts an impedance of an output buffer dependent upon refresh commands | Sep 9, 2010 | Issued |
Array
(
[id] => 9458472
[patent_doc_number] => 08719496
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-05-06
[patent_title] => 'Storage apparatus and method for executing exclusive extent processing in parallel using counter values'
[patent_app_type] => utility
[patent_app_number] => 12/922574
[patent_app_country] => US
[patent_app_date] => 2010-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 21
[patent_no_of_words] => 9273
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 344
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12922574
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/922574 | Storage apparatus and method for executing exclusive extent processing in parallel using counter values | Sep 1, 2010 | Issued |
Array
(
[id] => 8162566
[patent_doc_number] => 20120102280
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-26
[patent_title] => 'MANAGEMENT SERVER AND DATA MIGRATION METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/921724
[patent_app_country] => US
[patent_app_date] => 2010-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 11427
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0102/20120102280.pdf
[firstpage_image] =>[orig_patent_app_number] => 12921724
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/921724 | Management server and data migration method with improved duplicate data removal efficiency and shortened backup time | Aug 30, 2010 | Issued |
Array
(
[id] => 9302115
[patent_doc_number] => 08650358
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-02-11
[patent_title] => 'Storage system providing virtual volume and electrical power saving control method including moving data and changing allocations between real and virtual storage areas'
[patent_app_type] => utility
[patent_app_number] => 12/922258
[patent_app_country] => US
[patent_app_date] => 2010-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 20
[patent_no_of_words] => 14460
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 12
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12922258
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/922258 | Storage system providing virtual volume and electrical power saving control method including moving data and changing allocations between real and virtual storage areas | Aug 25, 2010 | Issued |
Array
(
[id] => 5932455
[patent_doc_number] => 20110040930
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-02-17
[patent_title] => 'Method for Accessing Flash Memory Device and Memory System Including the Same'
[patent_app_type] => utility
[patent_app_number] => 12/848394
[patent_app_country] => US
[patent_app_date] => 2010-08-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 13284
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0040/20110040930.pdf
[firstpage_image] =>[orig_patent_app_number] => 12848394
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/848394 | Method for Accessing Flash Memory Device and Memory System Including the Same | Aug 1, 2010 | Abandoned |
Array
(
[id] => 11482340
[patent_doc_number] => 09588888
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-03-07
[patent_title] => 'Memory device and method for altering performance characteristic based on bandwidth demand'
[patent_app_type] => utility
[patent_app_number] => 12/847907
[patent_app_country] => US
[patent_app_date] => 2010-07-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 4531
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12847907
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/847907 | Memory device and method for altering performance characteristic based on bandwidth demand | Jul 29, 2010 | Issued |
Array
(
[id] => 9652093
[patent_doc_number] => 08806128
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-08-12
[patent_title] => 'System and method for information security device with compact flash interface'
[patent_app_type] => utility
[patent_app_number] => 12/921002
[patent_app_country] => US
[patent_app_date] => 2010-07-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 7311
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 281
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12921002
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/921002 | System and method for information security device with compact flash interface | Jul 22, 2010 | Issued |
Array
(
[id] => 9871492
[patent_doc_number] => 08959284
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2015-02-17
[patent_title] => 'Disk drive steering write data to write cache based on workload'
[patent_app_type] => utility
[patent_app_number] => 12/824959
[patent_app_country] => US
[patent_app_date] => 2010-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 15
[patent_no_of_words] => 3326
[patent_no_of_claims] => 26
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 167
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824959
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/824959 | Disk drive steering write data to write cache based on workload | Jun 27, 2010 | Issued |
Array
(
[id] => 9248368
[patent_doc_number] => 08612669
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2013-12-17
[patent_title] => 'System and method for performing data retention in solid-state memory using copy commands and validity and usage data'
[patent_app_type] => utility
[patent_app_number] => 12/824434
[patent_app_country] => US
[patent_app_date] => 2010-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3581
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 172
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12824434
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/824434 | System and method for performing data retention in solid-state memory using copy commands and validity and usage data | Jun 27, 2010 | Issued |
Array
(
[id] => 8935570
[patent_doc_number] => 08495287
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-07-23
[patent_title] => 'Clock-based debugging for embedded dynamic random access memory element in a processor core'
[patent_app_type] => utility
[patent_app_number] => 12/822882
[patent_app_country] => US
[patent_app_date] => 2010-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4113
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12822882
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/822882 | Clock-based debugging for embedded dynamic random access memory element in a processor core | Jun 23, 2010 | Issued |
Array
(
[id] => 7671463
[patent_doc_number] => 20110320732
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-29
[patent_title] => 'USER-CONTROLLED TARGETED CACHE PURGE'
[patent_app_type] => utility
[patent_app_number] => 12/822428
[patent_app_country] => US
[patent_app_date] => 2010-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 3433
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12822428
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/822428 | User-controlled targeted cache purge | Jun 23, 2010 | Issued |
Array
(
[id] => 8728279
[patent_doc_number] => 08407420
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2013-03-26
[patent_title] => 'System, apparatus and method utilizing early access to shared cache pipeline for latency reduction'
[patent_app_type] => utility
[patent_app_number] => 12/821721
[patent_app_country] => US
[patent_app_date] => 2010-06-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 4919
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12821721
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/821721 | System, apparatus and method utilizing early access to shared cache pipeline for latency reduction | Jun 22, 2010 | Issued |