
Abdulfattah B. Mustapha
Examiner (ID: 5532)
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812, 2809 |
| Total Applications | 635 |
| Issued Applications | 534 |
| Pending Applications | 2 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 8489613
[patent_doc_number] => 20120289020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-11-15
[patent_title] => 'METHOD FOR FABRICATING VARIABLE RESISTANCE MEMORY DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/330639
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 3221
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330639
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330639 | METHOD FOR FABRICATING VARIABLE RESISTANCE MEMORY DEVICE | Dec 18, 2011 | Abandoned |
Array
(
[id] => 8884263
[patent_doc_number] => 20130157447
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-06-20
[patent_title] => 'SINGLE CRYSTAL SILICON TFTS MADE BY LATERAL CRYSTALLIZATION FROM A NANOWIRE SEED'
[patent_app_type] => utility
[patent_app_number] => 13/330516
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 3313
[patent_no_of_claims] => 24
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330516
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330516 | Single crystal silicon TFTs made by lateral crystallization from a nanowire seed | Dec 18, 2011 | Issued |
Array
(
[id] => 8509718
[patent_doc_number] => 20120309126
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-12-06
[patent_title] => 'METHOD OF MANUFACTURING PHOTOELECTRODE STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/330606
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 6063
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330606
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330606 | METHOD OF MANUFACTURING PHOTOELECTRODE STRUCTURE | Dec 18, 2011 | Abandoned |
Array
(
[id] => 10004331
[patent_doc_number] => 09048430
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-06-02
[patent_title] => 'Non-halogenated etchant and method of manufacturing a display substrate using the non-halogenated etchant'
[patent_app_type] => utility
[patent_app_number] => 13/330657
[patent_app_country] => US
[patent_app_date] => 2011-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 31
[patent_no_of_words] => 12149
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13330657
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/330657 | Non-halogenated etchant and method of manufacturing a display substrate using the non-halogenated etchant | Dec 18, 2011 | Issued |
Array
(
[id] => 8363541
[patent_doc_number] => 08252608
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2012-08-28
[patent_title] => 'Measurement of a sample using multiple models'
[patent_app_type] => utility
[patent_app_number] => 13/301317
[patent_app_country] => US
[patent_app_date] => 2011-11-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 7
[patent_no_of_words] => 4620
[patent_no_of_claims] => 16
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13301317
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/301317 | Measurement of a sample using multiple models | Nov 20, 2011 | Issued |
Array
(
[id] => 9118145
[patent_doc_number] => 20130285067
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-10-31
[patent_title] => 'METHOD FOR FORMING A BURIED METAL LAYER STRUCTURE'
[patent_app_type] => utility
[patent_app_number] => 13/988196
[patent_app_country] => US
[patent_app_date] => 2011-11-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 6132
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13988196
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/988196 | Method for forming a buried metal layer structure | Nov 15, 2011 | Issued |
Array
(
[id] => 8270293
[patent_doc_number] => 08211796
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-07-03
[patent_title] => 'Semiconductor device manufacturing method'
[patent_app_type] => utility
[patent_app_number] => 13/282494
[patent_app_country] => US
[patent_app_date] => 2011-10-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 18
[patent_no_of_words] => 8971
[patent_no_of_claims] => 22
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 236
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13282494
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/282494 | Semiconductor device manufacturing method | Oct 26, 2011 | Issued |
Array
(
[id] => 11578911
[patent_doc_number] => 09634181
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2017-04-25
[patent_title] => 'Method of forming a composite substrate'
[patent_app_type] => utility
[patent_app_number] => 13/877549
[patent_app_country] => US
[patent_app_date] => 2011-10-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 7
[patent_no_of_words] => 4842
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877549
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/877549 | Method of forming a composite substrate | Oct 25, 2011 | Issued |
Array
(
[id] => 7767239
[patent_doc_number] => 20120034754
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-09
[patent_title] => 'SEMICONDUCTOR DEVICE MANUFACATURING METHOD AND SILICON OXIDE FILM FORMING METHOD'
[patent_app_type] => utility
[patent_app_number] => 13/272457
[patent_app_country] => US
[patent_app_date] => 2011-10-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 12918
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20120034754.pdf
[firstpage_image] =>[orig_patent_app_number] => 13272457
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/272457 | SEMICONDUCTOR DEVICE MANUFACATURING METHOD AND SILICON OXIDE FILM FORMING METHOD | Oct 12, 2011 | Abandoned |
Array
(
[id] => 9983502
[patent_doc_number] => 09029209
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-05-12
[patent_title] => 'Method of manufacturing a thin film transistor substrate and thin film transistor substrate manufactured by the same'
[patent_app_type] => utility
[patent_app_number] => 13/877465
[patent_app_country] => US
[patent_app_date] => 2011-10-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
[patent_no_of_words] => 5987
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 314
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877465
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/877465 | Method of manufacturing a thin film transistor substrate and thin film transistor substrate manufactured by the same | Oct 10, 2011 | Issued |
Array
(
[id] => 7767237
[patent_doc_number] => 20120034753
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-02-09
[patent_title] => 'Methods of Forming a Plurality of Capacitors'
[patent_app_type] => utility
[patent_app_number] => 13/269756
[patent_app_country] => US
[patent_app_date] => 2011-10-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 4089
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 7
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0034/20120034753.pdf
[firstpage_image] =>[orig_patent_app_number] => 13269756
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/269756 | Methods of forming a plurality of capacitors | Oct 9, 2011 | Issued |
Array
(
[id] => 8963596
[patent_doc_number] => 20130203198
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-08
[patent_title] => 'Micro-Pattern Forming Method, and Micro-Channel Transistor and Micro-Channel Light-Emitting Transistor Forming Method Using Same'
[patent_app_type] => utility
[patent_app_number] => 13/877875
[patent_app_country] => US
[patent_app_date] => 2011-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 13500
[patent_no_of_claims] => 39
[patent_no_of_ind_claims] => 6
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877875
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/877875 | Micro-pattern forming method, and micro-channel transistor and micro-channel light-emitting transistor forming method using same | Oct 5, 2011 | Issued |
Array
(
[id] => 10189813
[patent_doc_number] => 09219246
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2015-12-22
[patent_title] => 'Organic electronic device with encapsulation'
[patent_app_type] => utility
[patent_app_number] => 13/877689
[patent_app_country] => US
[patent_app_date] => 2011-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 13
[patent_no_of_words] => 2879
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877689
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/877689 | Organic electronic device with encapsulation | Oct 5, 2011 | Issued |
Array
(
[id] => 8976747
[patent_doc_number] => 20130210177
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-15
[patent_title] => 'METHOD FOR MANUFACTURING AN ORGANIC ELECTRONIC DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/877684
[patent_app_country] => US
[patent_app_date] => 2011-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 2415
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13877684
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/877684 | Method for manufacturing an organic electronic device | Oct 5, 2011 | Issued |
Array
(
[id] => 8963611
[patent_doc_number] => 20130203213
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-08-08
[patent_title] => 'METHOD FOR MANUFACTURING PHOTOVOLTAIC CELL'
[patent_app_type] => utility
[patent_app_number] => 13/823162
[patent_app_country] => US
[patent_app_date] => 2011-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 13977
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13823162
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/823162 | METHOD FOR MANUFACTURING PHOTOVOLTAIC CELL | Oct 2, 2011 | |
Array
(
[id] => 9227900
[patent_doc_number] => 08633570
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2014-01-21
[patent_title] => 'Method for manufacturing SOI substrate and SOI substrate'
[patent_app_type] => utility
[patent_app_number] => 13/244394
[patent_app_country] => US
[patent_app_date] => 2011-09-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 70
[patent_no_of_words] => 17422
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13244394
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/244394 | Method for manufacturing SOI substrate and SOI substrate | Sep 23, 2011 | Issued |
Array
(
[id] => 7717221
[patent_doc_number] => 20120007256
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-01-12
[patent_title] => 'REDISTRIBUTION LAYERS FOR MICROFEATURE WORKPIECES, AND ASSOCIATED SYSTEMS AND METHODS'
[patent_app_type] => utility
[patent_app_number] => 13/236372
[patent_app_country] => US
[patent_app_date] => 2011-09-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 18
[patent_figures_cnt] => 18
[patent_no_of_words] => 5551
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0007/20120007256.pdf
[firstpage_image] =>[orig_patent_app_number] => 13236372
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/236372 | Redistribution layers for microfeature workpieces, and associated systems and methods | Sep 18, 2011 | Issued |
Array
(
[id] => 8089977
[patent_doc_number] => 20120080597
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2012-04-05
[patent_title] => 'APPARATUS AND METHOD TO INSPECT DEFECT OF SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 13/226757
[patent_app_country] => US
[patent_app_date] => 2011-09-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 5735
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0080/20120080597.pdf
[firstpage_image] =>[orig_patent_app_number] => 13226757
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/226757 | Apparatus and method to inspect defect of semiconductor device | Sep 6, 2011 | Issued |
Array
(
[id] => 7669585
[patent_doc_number] => 20110318854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-12-29
[patent_title] => 'METHOD OF MOUNTING MEMS INTEGRATED CIRCUITS DIRECTLY FROM WAFER FILM FRAME'
[patent_app_type] => utility
[patent_app_number] => 13/225474
[patent_app_country] => US
[patent_app_date] => 2011-09-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 7354
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13225474
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/225474 | Method of mounting MEMS integrated circuits directly from wafer film frame | Sep 3, 2011 | Issued |
Array
(
[id] => 8694855
[patent_doc_number] => 20130056865
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2013-03-07
[patent_title] => 'Method of Three Dimensional Integrated Circuit Assembly'
[patent_app_type] => utility
[patent_app_number] => 13/224575
[patent_app_country] => US
[patent_app_date] => 2011-09-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 2277
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13224575
[rel_patent_id] =>[rel_patent_doc_number] =>) 13/224575 | Method of three dimensional integrated circuit assembly | Sep 1, 2011 | Issued |