
Abdulfattah B. Mustapha
Examiner (ID: 5532)
| Most Active Art Unit | 2812 |
| Art Unit(s) | 2812, 2809 |
| Total Applications | 635 |
| Issued Applications | 534 |
| Pending Applications | 2 |
| Abandoned Applications | 97 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 5546058
[patent_doc_number] => 20090155935
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-06-18
[patent_title] => 'BACK SIDE WAFER DICING'
[patent_app_type] => utility
[patent_app_number] => 12/389686
[patent_app_country] => US
[patent_app_date] => 2009-02-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5031
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0155/20090155935.pdf
[firstpage_image] =>[orig_patent_app_number] => 12389686
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/389686 | BACK SIDE WAFER DICING | Feb 19, 2009 | Abandoned |
Array
(
[id] => 5265024
[patent_doc_number] => 20090117709
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-05-07
[patent_title] => 'MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/347588
[patent_app_country] => US
[patent_app_date] => 2008-12-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 16
[patent_no_of_words] => 12174
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0117/20090117709.pdf
[firstpage_image] =>[orig_patent_app_number] => 12347588
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/347588 | MANUFACTURING METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE | Dec 30, 2008 | Abandoned |
Array
(
[id] => 6600581
[patent_doc_number] => 20100032805
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-02-11
[patent_title] => 'METHODS AND STRUCTURES FOR RELAXATION OF STRAINED LAYERS'
[patent_app_type] => utility
[patent_app_number] => 12/341722
[patent_app_country] => US
[patent_app_date] => 2008-12-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 4112
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0032/20100032805.pdf
[firstpage_image] =>[orig_patent_app_number] => 12341722
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/341722 | Methods and structures for relaxation of strained layers | Dec 21, 2008 | Issued |
Array
(
[id] => 7550578
[patent_doc_number] => 08062910
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2011-11-22
[patent_title] => 'Measurement of a sample using multiple models'
[patent_app_type] => utility
[patent_app_number] => 12/270776
[patent_app_country] => US
[patent_app_date] => 2008-11-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 8
[patent_no_of_words] => 4466
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/062/08062910.pdf
[firstpage_image] =>[orig_patent_app_number] => 12270776
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/270776 | Measurement of a sample using multiple models | Nov 12, 2008 | Issued |
Array
(
[id] => 5319159
[patent_doc_number] => 20090057149
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-03-05
[patent_title] => 'Method of Manufacturing a Diagnostic Test Strip'
[patent_app_type] => utility
[patent_app_number] => 12/268499
[patent_app_country] => US
[patent_app_date] => 2008-11-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8193
[patent_no_of_claims] => 51
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0057/20090057149.pdf
[firstpage_image] =>[orig_patent_app_number] => 12268499
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/268499 | Method of Manufacturing a Diagnostic Test Strip | Nov 10, 2008 | Abandoned |
Array
(
[id] => 5337399
[patent_doc_number] => 20090053863
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-02-26
[patent_title] => 'Mask and Manufacturing Method of a Semiconductor Device and a Thin Film Transistor Array Panel Using the Mask'
[patent_app_type] => utility
[patent_app_number] => 12/258228
[patent_app_country] => US
[patent_app_date] => 2008-10-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 22
[patent_no_of_words] => 6202
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0053/20090053863.pdf
[firstpage_image] =>[orig_patent_app_number] => 12258228
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/258228 | Mask and manufacturing method of a semiconductor device and a thin film transistor array panel using the mask | Oct 23, 2008 | Issued |
Array
(
[id] => 7751383
[patent_doc_number] => 08110436
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2012-02-07
[patent_title] => 'Method for manufacturing field-effect transistor'
[patent_app_type] => utility
[patent_app_number] => 12/671054
[patent_app_country] => US
[patent_app_date] => 2008-09-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 18
[patent_no_of_words] => 8484
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/08/110/08110436.pdf
[firstpage_image] =>[orig_patent_app_number] => 12671054
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/671054 | Method for manufacturing field-effect transistor | Sep 24, 2008 | Issued |
Array
(
[id] => 6348356
[patent_doc_number] => 20100330759
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-12-30
[patent_title] => 'NANOWIRE TRANSISTOR WITH SURROUNDING GATE'
[patent_app_type] => utility
[patent_app_number] => 12/198265
[patent_app_country] => US
[patent_app_date] => 2008-08-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4218
[patent_no_of_claims] => 25
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0330/20100330759.pdf
[firstpage_image] =>[orig_patent_app_number] => 12198265
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/198265 | Nanowire transistor with surrounding gate | Aug 25, 2008 | Issued |
Array
(
[id] => 4792193
[patent_doc_number] => 20080293167
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-27
[patent_title] => 'FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/184563
[patent_app_country] => US
[patent_app_date] => 2008-08-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 23
[patent_figures_cnt] => 23
[patent_no_of_words] => 11256
[patent_no_of_claims] => 1
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0293/20080293167.pdf
[firstpage_image] =>[orig_patent_app_number] => 12184563
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/184563 | FABRICATION METHOD OF SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE | Jul 31, 2008 | Abandoned |
Array
(
[id] => 6640760
[patent_doc_number] => 20100227422
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-09-09
[patent_title] => 'METHOD FOR MANUFACTURING ORGANIC ELECTROLUMINESCENCE DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/670524
[patent_app_country] => US
[patent_app_date] => 2008-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7018
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0227/20100227422.pdf
[firstpage_image] =>[orig_patent_app_number] => 12670524
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/670524 | Method for manufacturing organic electroluminescence device | Jul 23, 2008 | Issued |
Array
(
[id] => 4957996
[patent_doc_number] => 20080272420
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-11-06
[patent_title] => 'CMOS image sensor and manufacturing method thereof'
[patent_app_type] => utility
[patent_app_number] => 12/216994
[patent_app_country] => US
[patent_app_date] => 2008-07-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2542
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0272/20080272420.pdf
[firstpage_image] =>[orig_patent_app_number] => 12216994
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/216994 | CMOS image sensor and manufacturing method thereof | Jul 13, 2008 | Abandoned |
Array
(
[id] => 4887012
[patent_doc_number] => 20080261344
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-23
[patent_title] => 'VACUUM PACKAGED SINGLE CRYSTAL SILICON DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/164850
[patent_app_country] => US
[patent_app_date] => 2008-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8220
[patent_no_of_claims] => 4
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0261/20080261344.pdf
[firstpage_image] =>[orig_patent_app_number] => 12164850
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/164850 | Vacuum packaged single crystal silicon device | Jun 29, 2008 | Issued |
Array
(
[id] => 4887011
[patent_doc_number] => 20080261343
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-23
[patent_title] => 'VACUUM PACKAGED SINGLE CRYSTAL SILICON DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/164820
[patent_app_country] => US
[patent_app_date] => 2008-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 8220
[patent_no_of_claims] => 8
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0261/20080261343.pdf
[firstpage_image] =>[orig_patent_app_number] => 12164820
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/164820 | Vacuum packaged single crystal silicon device | Jun 29, 2008 | Issued |
Array
(
[id] => 132452
[patent_doc_number] => 07695988
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2010-04-13
[patent_title] => 'Quantum dot conjugates in a sub-micrometer fluidic channel'
[patent_app_type] => utility
[patent_app_number] => 12/143334
[patent_app_country] => US
[patent_app_date] => 2008-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 7656
[patent_no_of_claims] => 23
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/07/695/07695988.pdf
[firstpage_image] =>[orig_patent_app_number] => 12143334
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/143334 | Quantum dot conjugates in a sub-micrometer fluidic channel | Jun 19, 2008 | Issued |
Array
(
[id] => 4679244
[patent_doc_number] => 20080245470
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-10-09
[patent_title] => 'SYSTEM AND METHOD FOR IMPROVED AUTO-BOATING'
[patent_app_type] => utility
[patent_app_number] => 12/139801
[patent_app_country] => US
[patent_app_date] => 2008-06-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 3
[patent_no_of_words] => 2288
[patent_no_of_claims] => 12
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0245/20080245470.pdf
[firstpage_image] =>[orig_patent_app_number] => 12139801
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/139801 | SYSTEM AND METHOD FOR IMPROVED AUTO-BOATING | Jun 15, 2008 | Abandoned |
Array
(
[id] => 6583023
[patent_doc_number] => 20100129960
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2010-05-27
[patent_title] => 'METHOD FOR BONDING SEMICONDUCTOR WAFERS AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE'
[patent_app_type] => utility
[patent_app_number] => 12/597652
[patent_app_country] => US
[patent_app_date] => 2008-04-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 25093
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0129/20100129960.pdf
[firstpage_image] =>[orig_patent_app_number] => 12597652
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/597652 | Method for bonding semiconductor wafers and method for manufacturing semiconductor device | Apr 23, 2008 | Issued |
Array
(
[id] => 5456013
[patent_doc_number] => 20090256165
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-15
[patent_title] => 'METHOD OF GROWING AN ACTIVE REGION IN A SEMICONDUCTOR DEVICE USING MOLECULAR BEAM EPITAXY'
[patent_app_type] => utility
[patent_app_number] => 12/102261
[patent_app_country] => US
[patent_app_date] => 2008-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 6
[patent_no_of_words] => 5169
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0256/20090256165.pdf
[firstpage_image] =>[orig_patent_app_number] => 12102261
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/102261 | METHOD OF GROWING AN ACTIVE REGION IN A SEMICONDUCTOR DEVICE USING MOLECULAR BEAM EPITAXY | Apr 13, 2008 | Abandoned |
Array
(
[id] => 5469914
[patent_doc_number] => 20090243080
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-10-01
[patent_title] => 'Flip Chip Interconnection Structure with Bump on Partial Pad and Method Thereof'
[patent_app_type] => utility
[patent_app_number] => 12/055152
[patent_app_country] => US
[patent_app_date] => 2008-03-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 3184
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0243/20090243080.pdf
[firstpage_image] =>[orig_patent_app_number] => 12055152
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/055152 | Flip chip interconnection structure with bump on partial pad and method thereof | Mar 24, 2008 | Issued |
Array
(
[id] => 5514975
[patent_doc_number] => 20090215282
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2009-08-27
[patent_title] => 'PROCESSES FOR CURING SILICON BASED LOW-K DIELECTRIC MATERIALS'
[patent_app_type] => utility
[patent_app_number] => 12/037222
[patent_app_country] => US
[patent_app_date] => 2008-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 5591
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0215/20090215282.pdf
[firstpage_image] =>[orig_patent_app_number] => 12037222
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/037222 | Processes for curing silicon based low-k dielectric materials | Feb 25, 2008 | Issued |
Array
(
[id] => 4727384
[patent_doc_number] => 20080206928
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2008-08-28
[patent_title] => 'SOLDERING METHOD AND METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE INCLUDING SOLDERING METHOD'
[patent_app_type] => utility
[patent_app_number] => 12/037721
[patent_app_country] => US
[patent_app_date] => 2008-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 6101
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 0
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0206/20080206928.pdf
[firstpage_image] =>[orig_patent_app_number] => 12037721
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/037721 | Soldering method and method of manufacturing semiconductor device including soldering method | Feb 25, 2008 | Issued |