Search

Abdulfattah B. Mustapha

Examiner (ID: 5532)

Most Active Art Unit
2812
Art Unit(s)
2812, 2809
Total Applications
635
Issued Applications
534
Pending Applications
2
Abandoned Applications
97

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4711155 [patent_doc_number] => 20080299681 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-04 [patent_title] => 'MULTI-STEP DEPOSITION CONTROL' [patent_app_type] => utility [patent_app_number] => 12/021791 [patent_app_country] => US [patent_app_date] => 2008-01-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 6856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0299/20080299681.pdf [firstpage_image] =>[orig_patent_app_number] => 12021791 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/021791
Multi-step deposition control Jan 28, 2008 Issued
Array ( [id] => 5296677 [patent_doc_number] => 20090011603 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-08 [patent_title] => 'METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/020761 [patent_app_country] => US [patent_app_date] => 2008-01-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1913 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0011/20090011603.pdf [firstpage_image] =>[orig_patent_app_number] => 12020761 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/020761
Method of manufacturing semiconductor device Jan 27, 2008 Issued
Array ( [id] => 4866618 [patent_doc_number] => 20080145677 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-06-19 [patent_title] => 'Coating composition for insulating film production, preparation method of insulation film by using the same, insulation film for semi-conductor device prepared therefrom, and semi-conductor device comprising the same' [patent_app_type] => utility [patent_app_number] => 12/010541 [patent_app_country] => US [patent_app_date] => 2008-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 6916 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20080145677.pdf [firstpage_image] =>[orig_patent_app_number] => 12010541 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/010541
Coating composition for insulating film production, preparation method of insulation film by using the same, insulation film for semi-conductor device prepared therefrom, and semi-conductor device comprising the same Jan 24, 2008 Issued
Array ( [id] => 803211 [patent_doc_number] => 07422914 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-09-09 [patent_title] => 'Fabrication method of semiconductor integrated circuit device' [patent_app_type] => utility [patent_app_number] => 11/936358 [patent_app_country] => US [patent_app_date] => 2007-11-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 25 [patent_no_of_words] => 11240 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/422/07422914.pdf [firstpage_image] =>[orig_patent_app_number] => 11936358 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/936358
Fabrication method of semiconductor integrated circuit device Nov 6, 2007 Issued
Array ( [id] => 5330738 [patent_doc_number] => 20090111215 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-04-30 [patent_title] => 'Modular Chip Integration Techniques' [patent_app_type] => utility [patent_app_number] => 11/929612 [patent_app_country] => US [patent_app_date] => 2007-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 9259 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0111/20090111215.pdf [firstpage_image] =>[orig_patent_app_number] => 11929612 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/929612
Modular chip integration techniques Oct 29, 2007 Issued
Array ( [id] => 4822123 [patent_doc_number] => 20080227264 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-09-18 [patent_title] => 'VERTICAL NANOTUBE SEMICONDUCTOR DEVICE STRUCTURES AND METHODS OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/926661 [patent_app_country] => US [patent_app_date] => 2007-10-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4137 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0227/20080227264.pdf [firstpage_image] =>[orig_patent_app_number] => 11926661 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/926661
Vertical nanotube semiconductor device structures and methods of forming the same Oct 28, 2007 Issued
Array ( [id] => 71584 [patent_doc_number] => 07754593 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Semiconductor device and manufacturing method therefor' [patent_app_type] => utility [patent_app_number] => 11/882621 [patent_app_country] => US [patent_app_date] => 2007-08-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 6310 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/754/07754593.pdf [firstpage_image] =>[orig_patent_app_number] => 11882621 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/882621
Semiconductor device and manufacturing method therefor Aug 2, 2007 Issued
Array ( [id] => 7527359 [patent_doc_number] => 08043951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-10-25 [patent_title] => 'Method of manufacturing a semiconductor device and semiconductor device obtainable therewith' [patent_app_type] => utility [patent_app_number] => 12/670502 [patent_app_country] => US [patent_app_date] => 2007-08-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 4902 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/043/08043951.pdf [firstpage_image] =>[orig_patent_app_number] => 12670502 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/670502
Method of manufacturing a semiconductor device and semiconductor device obtainable therewith Jul 31, 2007 Issued
Array ( [id] => 81614 [patent_doc_number] => 07745330 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2010-06-29 [patent_title] => 'Method of carbon nanotube modification' [patent_app_type] => utility [patent_app_number] => 11/890102 [patent_app_country] => US [patent_app_date] => 2007-07-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 3989 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/745/07745330.pdf [firstpage_image] =>[orig_patent_app_number] => 11890102 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/890102
Method of carbon nanotube modification Jul 30, 2007 Issued
Array ( [id] => 5349415 [patent_doc_number] => 20090004776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'METHOD OF FABRICATING A MEMORY CARD USING SIP/SMT HYBRID TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 11/769942 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4316 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20090004776.pdf [firstpage_image] =>[orig_patent_app_number] => 11769942 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769942
Method of fabricating a memory card using SiP/SMT hybrid technology Jun 27, 2007 Issued
Array ( [id] => 5349421 [patent_doc_number] => 20090004782 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'METHOD OF FABRICATING A TWO-SIDED DIE IN A FOUR-SIDED LEADFRAME BASED PACKAGE' [patent_app_type] => utility [patent_app_number] => 11/770052 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4729 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20090004782.pdf [firstpage_image] =>[orig_patent_app_number] => 11770052 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770052
Method of fabricating a two-sided die in a four-sided leadframe based package Jun 27, 2007 Issued
Array ( [id] => 4752641 [patent_doc_number] => 20080160716 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'METHOD FOR FABRICATING AN ISOLATION LAYER IN A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/770522 [patent_app_country] => US [patent_app_date] => 2007-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2522 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20080160716.pdf [firstpage_image] =>[orig_patent_app_number] => 11770522 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/770522
METHOD FOR FABRICATING AN ISOLATION LAYER IN A SEMICONDUCTOR DEVICE Jun 27, 2007 Abandoned
Array ( [id] => 102361 [patent_doc_number] => 07723133 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-25 [patent_title] => 'Method for forming pattern, and method for manufacturing liquid crystal display' [patent_app_type] => utility [patent_app_number] => 11/769301 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 31 [patent_no_of_words] => 12921 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/723/07723133.pdf [firstpage_image] =>[orig_patent_app_number] => 11769301 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769301
Method for forming pattern, and method for manufacturing liquid crystal display Jun 26, 2007 Issued
Array ( [id] => 4669921 [patent_doc_number] => 20080044981 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-02-21 [patent_title] => 'Trench Isolation Methods, Methods of Forming Gate Structures Using the Trench Isolation Methods and Methods of Fabricating Non-Volatile Memory Devices Using the Trench Isolation Methods' [patent_app_type] => utility [patent_app_number] => 11/769042 [patent_app_country] => US [patent_app_date] => 2007-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5278 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0044/20080044981.pdf [firstpage_image] =>[orig_patent_app_number] => 11769042 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/769042
Trench Isolation Methods, Methods of Forming Gate Structures Using the Trench Isolation Methods and Methods of Fabricating Non-Volatile Memory Devices Using the Trench Isolation Methods Jun 26, 2007 Abandoned
Array ( [id] => 4932974 [patent_doc_number] => 20080003749 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'Method Of Manufacturing A Flash Memory Device' [patent_app_type] => utility [patent_app_number] => 11/768722 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 1760 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20080003749.pdf [firstpage_image] =>[orig_patent_app_number] => 11768722 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768722
Method of manufacturing a flash memory device Jun 25, 2007 Issued
Array ( [id] => 5349482 [patent_doc_number] => 20090004843 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'METHOD FOR FORMING DUAL BIT LINE METAL LAYERS FOR NON-VOLATILE MEMORY' [patent_app_type] => utility [patent_app_number] => 11/768461 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9443 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0004/20090004843.pdf [firstpage_image] =>[orig_patent_app_number] => 11768461 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768461
Method for forming dual bit line metal layers for non-volatile memory Jun 25, 2007 Issued
Array ( [id] => 5346128 [patent_doc_number] => 20090001489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-01-01 [patent_title] => 'SILICON PHOTODETECTOR AND METHOD FOR FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 11/768721 [patent_app_country] => US [patent_app_date] => 2007-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 2120 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0001/20090001489.pdf [firstpage_image] =>[orig_patent_app_number] => 11768721 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768721
SILICON PHOTODETECTOR AND METHOD FOR FORMING THE SAME Jun 25, 2007 Abandoned
Array ( [id] => 4852636 [patent_doc_number] => 20080318379 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHOD FOR FABRICATING NON-VOLATILE STORAGE WITH INDIVIDUALLY CONTROLLABLE SHIELD PLATES BETWEEN STORAGE ELEMENTS' [patent_app_type] => utility [patent_app_number] => 11/767661 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 11229 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318379.pdf [firstpage_image] =>[orig_patent_app_number] => 11767661 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/767661
Method for fabricating non-volatile storage with individually controllable shield plates between storage elements Jun 24, 2007 Issued
Array ( [id] => 4932995 [patent_doc_number] => 20080003770 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-01-03 [patent_title] => 'METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/768061 [patent_app_country] => US [patent_app_date] => 2007-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 21589 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0003/20080003770.pdf [firstpage_image] =>[orig_patent_app_number] => 11768061 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/768061
Method for manufacturing semiconductor device Jun 24, 2007 Issued
Array ( [id] => 4852677 [patent_doc_number] => 20080318420 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'TWO STEP CHEMICAL MECHANICAL POLISH' [patent_app_type] => utility [patent_app_number] => 11/766922 [patent_app_country] => US [patent_app_date] => 2007-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 1910 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318420.pdf [firstpage_image] =>[orig_patent_app_number] => 11766922 [rel_patent_id] =>[rel_patent_doc_number] =>)
11/766922
TWO STEP CHEMICAL MECHANICAL POLISH Jun 21, 2007 Abandoned
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