Abdulfattah B. Mustapha

Array ( [id] => 4852670 [patent_doc_number] => 20080318413 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'METHOD FOR MAKING AN INTERCONNECT STRUCTURE AND INTERCONNECT COMPONENT RECOVERY PROCESS' [patent_app_type] => utility [patent_app_number] => 11/766302 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12044 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318413.pdf [firstpage_image] =>[orig_patent_app_number] => 11766302 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4852633 [patent_doc_number] => 20080318376 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-25 [patent_title] => 'Semiconductor Device Manufactured Using a Method to Improve Gate Doping While Maintaining Good Gate Profile' [patent_app_type] => utility [patent_app_number] => 11/766191 [patent_app_country] => US [patent_app_date] => 2007-06-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5713 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0318/20080318376.pdf [firstpage_image] =>[orig_patent_app_number] => 11766191 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 151693 [patent_doc_number] => 07678667 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-03-16 [patent_title] => 'Method of bonding MEMS integrated circuits' [patent_app_type] => utility [patent_app_number] => 11/766052 [patent_app_country] => US [patent_app_date] => 2007-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 7587 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 122 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/678/07678667.pdf [firstpage_image] =>[orig_patent_app_number] => 11766052 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10863811 [patent_doc_number] => 08889507 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'MIM capacitors with improved reliability' [patent_app_type] => utility [patent_app_number] => 11/765971 [patent_app_country] => US [patent_app_date] => 2007-06-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3078 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 11765971 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 8017101 [patent_doc_number] => 08138053 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-03-20 [patent_title] => 'Method of forming source and drain of field-effect-transistor and structure thereof' [patent_app_type] => utility [patent_app_number] => 11/763561 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 3339 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/138/08138053.pdf [firstpage_image] =>[orig_patent_app_number] => 11763561 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4759484 [patent_doc_number] => 20080311710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-12-18 [patent_title] => 'METHOD TO FORM LOW-DEFECT POLYCRYSTALLINE SEMICONDUCTOR MATERIAL FOR USE IN A TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 11/763671 [patent_app_country] => US [patent_app_date] => 2007-06-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5633 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0311/20080311710.pdf [firstpage_image] =>[orig_patent_app_number] => 11763671 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4583040 [patent_doc_number] => 07851343 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-12-14 [patent_title] => 'Methods of forming ohmic layers through ablation capping layers' [patent_app_type] => utility [patent_app_number] => 11/763081 [patent_app_country] => US [patent_app_date] => 2007-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 4571 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/851/07851343.pdf [firstpage_image] =>[orig_patent_app_number] => 11763081 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 112389 [patent_doc_number] => 07713852 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-05-11 [patent_title] => 'Methods for forming field effect transistors and EPI-substrate' [patent_app_type] => utility [patent_app_number] => 11/761751 [patent_app_country] => US [patent_app_date] => 2007-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 4418 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/713/07713852.pdf [firstpage_image] =>[orig_patent_app_number] => 11761751 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4752672 [patent_doc_number] => 20080160747 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-07-03 [patent_title] => 'METHOD OF FORMING A GATE OF A SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 11/761281 [patent_app_country] => US [patent_app_date] => 2007-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1726 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0160/20080160747.pdf [firstpage_image] =>[orig_patent_app_number] => 11761281 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7518870 [patent_doc_number] => 07972971 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2011-07-05 [patent_title] => 'Method for producing Si1-yGey based zones with different contents in Ge on a same substrate by condensation of germanium' [patent_app_type] => utility [patent_app_number] => 11/761122 [patent_app_country] => US [patent_app_date] => 2007-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 22 [patent_no_of_words] => 6977 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/972/07972971.pdf [firstpage_image] =>[orig_patent_app_number] => 11761122 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 53072 [patent_doc_number] => 07772128 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-08-10 [patent_title] => 'Semiconductor system with surface modification' [patent_app_type] => utility [patent_app_number] => 11/760722 [patent_app_country] => US [patent_app_date] => 2007-06-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4361 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/772/07772128.pdf [firstpage_image] =>[orig_patent_app_number] => 11760722 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 71449 [patent_doc_number] => 07754510 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2010-07-13 [patent_title] => 'Phase-separated dielectric structure fabrication process' [patent_app_type] => utility [patent_app_number] => 11/695131 [patent_app_country] => US [patent_app_date] => 2007-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 7366 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 132 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/754/07754510.pdf [firstpage_image] =>[orig_patent_app_number] => 11695131 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 5010911 [patent_doc_number] => 20070281390 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-12-06 [patent_title] => 'Manufacturing method of a package substrate' [patent_app_type] => utility [patent_app_number] => 11/727852 [patent_app_country] => US [patent_app_date] => 2007-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2040 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0281/20070281390.pdf [firstpage_image] =>[orig_patent_app_number] => 11727852 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 7692104 [patent_doc_number] => 20070231929 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-10-04 [patent_title] => 'Processing method for wafer' [patent_app_type] => utility [patent_app_number] => 11/728931 [patent_app_country] => US [patent_app_date] => 2007-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 8808 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0231/20070231929.pdf [firstpage_image] =>[orig_patent_app_number] => 11728931 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4719470 [patent_doc_number] => 20080241993 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'GANG FLIPPING FOR IC PACKAGING' [patent_app_type] => utility [patent_app_number] => 11/691431 [patent_app_country] => US [patent_app_date] => 2007-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2414 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20080241993.pdf [firstpage_image] =>[orig_patent_app_number] => 11691431 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4715281 [patent_doc_number] => 20080237803 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2008-10-02 [patent_title] => 'SEMICONDUCTOR DEVICE HAVING STRUCTURE WITH FRACTIONAL DIMENSION OF THE MINIMUM DIMENSION OF A LITHOGRAPHY SYSTEM' [patent_app_type] => utility [patent_app_number] => 11/691332 [patent_app_country] => US [patent_app_date] => 2007-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3973 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0237/20080237803.pdf [firstpage_image] =>[orig_patent_app_number] => 11691332 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4977424 [patent_doc_number] => 20070218657 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'DEPOSITION OF CRYSTALLINE LAYERS ON POLYMER SUBSTRATES USING NANOPARTICLES AND LASER NANOFORMING' [patent_app_type] => utility [patent_app_number] => 11/686572 [patent_app_country] => US [patent_app_date] => 2007-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6958 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218657.pdf [firstpage_image] =>[orig_patent_app_number] => 11686572 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 341544 [patent_doc_number] => 07501302 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2009-03-10 [patent_title] => 'Electromagnetic micro-generator and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 11/685031 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 1777 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 154 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/501/07501302.pdf [firstpage_image] =>[orig_patent_app_number] => 11685031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4977352 [patent_doc_number] => 20070218585 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'ENCAPSULATION IN A HERMETIC CAVITY OF A MICROELECTRONIC COMPOSITE, PARTICULARLY OF A MEMS' [patent_app_type] => utility [patent_app_number] => 11/684732 [patent_app_country] => US [patent_app_date] => 2007-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3121 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218585.pdf [firstpage_image] =>[orig_patent_app_number] => 11684732 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 4977353 [patent_doc_number] => 20070218586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2007-09-20 [patent_title] => 'Manufacturing method of semiconductor device' [patent_app_type] => utility [patent_app_number] => 11/715961 [patent_app_country] => US [patent_app_date] => 2007-03-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7733 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0218/20070218586.pdf [firstpage_image] =>[orig_patent_app_number] => 11715961 [rel_patent_id] =>[rel_patent_doc_number] =>)