Search

Abigail Anne Risic

Examiner (ID: 15112, Phone: (571)270-7819 , Office: P/3671 )

Most Active Art Unit
3671
Art Unit(s)
3671
Total Applications
1386
Issued Applications
1012
Pending Applications
88
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 13514275 [patent_doc_number] => 20180308680 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-25 [patent_title] => SELECTIVE DEPOSITION WITH ATOMIC LAYER ETCH RESET [patent_app_type] => utility [patent_app_number] => 15/581951 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581951 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581951
Selective deposition with atomic layer etch reset Apr 27, 2017 Issued
Array ( [id] => 17002520 [patent_doc_number] => 11081342 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-08-03 [patent_title] => Selective deposition using hydrophobic precursors [patent_app_type] => utility [patent_app_number] => 15/581726 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 10 [patent_no_of_words] => 6938 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581726 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581726
Selective deposition using hydrophobic precursors Apr 27, 2017 Issued
Array ( [id] => 12214968 [patent_doc_number] => 09911785 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-03-06 [patent_title] => 'Method for making a device for detecting electromagnetic radiation comprising a layer of getter material' [patent_app_type] => utility [patent_app_number] => 15/581022 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 12 [patent_no_of_words] => 6599 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581022 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581022
Method for making a device for detecting electromagnetic radiation comprising a layer of getter material Apr 27, 2017 Issued
Array ( [id] => 12040728 [patent_doc_number] => 09818963 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2017-11-14 [patent_title] => 'Organic electric memory device based on phosphonic acid or trichlorosilane-modified ITO glass substrate and preparation method thereof' [patent_app_type] => utility [patent_app_number] => 15/581739 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1864 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15581739 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/581739
Organic electric memory device based on phosphonic acid or trichlorosilane-modified ITO glass substrate and preparation method thereof Apr 27, 2017 Issued
Array ( [id] => 12498231 [patent_doc_number] => 09997371 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-12 [patent_title] => Atomic layer etch methods and hardware for patterning applications [patent_app_type] => utility [patent_app_number] => 15/582359 [patent_app_country] => US [patent_app_date] => 2017-04-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 19 [patent_no_of_words] => 10644 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15582359 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/582359
Atomic layer etch methods and hardware for patterning applications Apr 27, 2017 Issued
Array ( [id] => 13640639 [patent_doc_number] => 09847280 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-19 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 15/498463 [patent_app_country] => US [patent_app_date] => 2017-04-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 22 [patent_no_of_words] => 10579 [patent_no_of_claims] => 2 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15498463 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/498463
Method for manufacturing semiconductor device Apr 25, 2017 Issued
Array ( [id] => 14205035 [patent_doc_number] => 10269639 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-23 [patent_title] => Method of manufacturing packaged wafer [patent_app_type] => utility [patent_app_number] => 15/472995 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 5188 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 260 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472995 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472995
Method of manufacturing packaged wafer Mar 28, 2017 Issued
Array ( [id] => 12102024 [patent_doc_number] => 09859123 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-01-02 [patent_title] => 'Method for fabricating semiconductor device' [patent_app_type] => utility [patent_app_number] => 15/472308 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2442 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472308 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472308
Method for fabricating semiconductor device Mar 28, 2017 Issued
Array ( [id] => 14252501 [patent_doc_number] => 10276457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-04-30 [patent_title] => Method for measuring charge accumulation in fabrication process of semiconductor device and method for fabricating semiconductor device [patent_app_type] => utility [patent_app_number] => 15/472306 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5121 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472306 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472306
Method for measuring charge accumulation in fabrication process of semiconductor device and method for fabricating semiconductor device Mar 28, 2017 Issued
Array ( [id] => 13470241 [patent_doc_number] => 20180286663 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-10-04 [patent_title] => METHOD OF REFORMING INSULATING FILM DEPOSITED ON SUBSTRATE WITH RECESS PATTERN [patent_app_type] => utility [patent_app_number] => 15/472750 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472750 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472750
Method of reforming insulating film deposited on substrate with recess pattern Mar 28, 2017 Issued
Array ( [id] => 12181547 [patent_doc_number] => 20180040483 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-08 [patent_title] => 'Methods of Fabricating Semiconductor Devices Including Support Patterns' [patent_app_type] => utility [patent_app_number] => 15/473333 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 8819 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15473333 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/473333
Methods of fabricating semiconductor devices including support patterns Mar 28, 2017 Issued
Array ( [id] => 12214837 [patent_doc_number] => 09911652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-06 [patent_title] => 'Forming self-aligned vias and air-gaps in semiconductor fabrication' [patent_app_type] => utility [patent_app_number] => 15/472745 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 10760 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 225 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472745 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472745
Forming self-aligned vias and air-gaps in semiconductor fabrication Mar 28, 2017 Issued
Array ( [id] => 11978273 [patent_doc_number] => 20170282426 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'Molding system with movable mold tool' [patent_app_type] => utility [patent_app_number] => 15/472721 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 9562 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472721 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472721
Molding system with movable mold tool Mar 28, 2017 Issued
Array ( [id] => 11983759 [patent_doc_number] => 20170287914 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'Method and Apparatus for Forming Boron-Doped Silicon Germanium Film, and Storage Medium' [patent_app_type] => utility [patent_app_number] => 15/472486 [patent_app_country] => US [patent_app_date] => 2017-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6357 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15472486 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/472486
Method and apparatus for forming boron-doped silicon germanium film, and storage medium Mar 28, 2017 Issued
Array ( [id] => 13159463 [patent_doc_number] => 10096465 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-09 [patent_title] => Substrate processing method, substrate processing apparatus and recording medium [patent_app_type] => utility [patent_app_number] => 15/471360 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 6317 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471360 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471360
Substrate processing method, substrate processing apparatus and recording medium Mar 27, 2017 Issued
Array ( [id] => 12215096 [patent_doc_number] => 09911914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-03-06 [patent_title] => 'Sub-lithographic magnetic tunnel junctions for magnetic random access memory devices' [patent_app_type] => utility [patent_app_number] => 15/471497 [patent_app_country] => US [patent_app_date] => 2017-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 28 [patent_no_of_words] => 5840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 203 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15471497 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/471497
Sub-lithographic magnetic tunnel junctions for magnetic random access memory devices Mar 27, 2017 Issued
Array ( [id] => 13452161 [patent_doc_number] => 20180277623 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-09-27 [patent_title] => SURFACE AREA ENHANCEMENT FOR STACKED METAL-INSULATOR-METAL (MIM) CAPACITOR [patent_app_type] => utility [patent_app_number] => 15/469860 [patent_app_country] => US [patent_app_date] => 2017-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6339 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15469860 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/469860
Surface area enhancement for stacked metal-insulator-metal (MIM) capacitor Mar 26, 2017 Issued
Array ( [id] => 11730729 [patent_doc_number] => 20170192172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-06 [patent_title] => 'INTEGRATION OF PHOTONIC, ELECTRONIC, AND SENSOR DEVICES WITH SOI VLSI MICROPROCESSOR TECHNOLOGY' [patent_app_type] => utility [patent_app_number] => 15/466966 [patent_app_country] => US [patent_app_date] => 2017-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 12890 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15466966 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/466966
Integration of photonic, electronic, and sensor devices with SOI VLSI microprocessor technology Mar 22, 2017 Issued
Array ( [id] => 11990193 [patent_doc_number] => 20170294348 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-12 [patent_title] => 'METHODS FOR FORMING 2-DIMENSIONAL SELF-ALIGNED VIAS' [patent_app_type] => utility [patent_app_number] => 15/453675 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3758 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453675 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453675
Methods for forming 2-dimensional self-aligned vias Mar 7, 2017 Issued
Array ( [id] => 14093907 [patent_doc_number] => 10242866 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-03-26 [patent_title] => Selective deposition of silicon nitride on silicon oxide using catalytic control [patent_app_type] => utility [patent_app_number] => 15/453815 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 10025 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15453815 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/453815
Selective deposition of silicon nitride on silicon oxide using catalytic control Mar 7, 2017 Issued
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