Search

Abigail Anne Risic

Examiner (ID: 15112, Phone: (571)270-7819 , Office: P/3671 )

Most Active Art Unit
3671
Art Unit(s)
3671
Total Applications
1386
Issued Applications
1012
Pending Applications
88
Abandoned Applications
315

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11847672 [patent_doc_number] => 09735231 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-15 [patent_title] => 'Block layer in the metal gate of MOS devices' [patent_app_type] => utility [patent_app_number] => 14/231099 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3608 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14231099 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/231099
Block layer in the metal gate of MOS devices Mar 30, 2014 Issued
Array ( [id] => 10394950 [patent_doc_number] => 20150279957 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD FOR THE SAME' [patent_app_type] => utility [patent_app_number] => 14/230223 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2740 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230223 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230223
Semiconductor structure and manufacturing method for the same Mar 30, 2014 Issued
Array ( [id] => 10568426 [patent_doc_number] => 09291588 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'System for forming aligned patterns on a substrate' [patent_app_type] => utility [patent_app_number] => 14/230140 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 16396 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 170 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230140 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230140
System for forming aligned patterns on a substrate Mar 30, 2014 Issued
Array ( [id] => 10394680 [patent_doc_number] => 20150279687 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'HALOGEN-FREE GAS-PHASE SILICON ETCH' [patent_app_type] => utility [patent_app_number] => 14/231180 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9905 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14231180 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/231180
Halogen-free gas-phase silicon etch Mar 30, 2014 Issued
Array ( [id] => 10394727 [patent_doc_number] => 20150279734 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'METHOD OF FORMING TRANSISTOR CONTACTS' [patent_app_type] => utility [patent_app_number] => 14/230410 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 3852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230410 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230410
Method of forming transistor contacts Mar 30, 2014 Issued
Array ( [id] => 10581976 [patent_doc_number] => 09304097 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Method for aligning patterns on a substrate' [patent_app_type] => utility [patent_app_number] => 14/230107 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 16433 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230107 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230107
Method for aligning patterns on a substrate Mar 30, 2014 Issued
Array ( [id] => 11725373 [patent_doc_number] => 09698240 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-07-04 [patent_title] => 'Semiconductor device and formation thereof' [patent_app_type] => utility [patent_app_number] => 14/230203 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 24 [patent_no_of_words] => 4310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230203 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230203
Semiconductor device and formation thereof Mar 30, 2014 Issued
Array ( [id] => 10389508 [patent_doc_number] => 20150274515 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'MICROELECTRONIC PACKAGES HAVING AXIALLY-PARTITIONED HERMETIC CAVITIES AND METHODS FOR THE FABRICATION THEREOF' [patent_app_type] => utility [patent_app_number] => 14/230273 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 7939 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230273 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230273
Microelectronic packages having axially-partitioned hermetic cavities and methods for the fabrication thereof Mar 30, 2014 Issued
Array ( [id] => 10394685 [patent_doc_number] => 20150279692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'SEMICONDUCTOR PROCESS TEMPERATURE OPTIMIZATION' [patent_app_type] => utility [patent_app_number] => 14/230065 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3394 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230065 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230065
Semiconductor process temperature optimization Mar 30, 2014 Issued
Array ( [id] => 10500567 [patent_doc_number] => 09228964 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-01-05 [patent_title] => 'System for aligning patterns on a substrate' [patent_app_type] => utility [patent_app_number] => 14/230114 [patent_app_country] => US [patent_app_date] => 2014-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 32 [patent_no_of_words] => 16431 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14230114 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/230114
System for aligning patterns on a substrate Mar 30, 2014 Issued
Array ( [id] => 10394711 [patent_doc_number] => 20150279718 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'Heat Assisted Handling of Highly Warped Substrates Post Temporary Bonding' [patent_app_type] => utility [patent_app_number] => 14/229902 [patent_app_country] => US [patent_app_date] => 2014-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 16601 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14229902 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/229902
Heat assisted handling of highly warped substrates post temporary bonding Mar 28, 2014 Issued
Array ( [id] => 10617859 [patent_doc_number] => 09337311 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'Electronic component, a semiconductor wafer and a method for producing an electronic component' [patent_app_type] => utility [patent_app_number] => 14/225652 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 2565 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 145 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14225652 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/225652
Electronic component, a semiconductor wafer and a method for producing an electronic component Mar 25, 2014 Issued
Array ( [id] => 11453209 [patent_doc_number] => 09576860 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Method and apparatus providing inline photoluminescence analysis of a photovoltaic device' [patent_app_type] => utility [patent_app_number] => 14/205810 [patent_app_country] => US [patent_app_date] => 2014-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 5252 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14205810 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/205810
Method and apparatus providing inline photoluminescence analysis of a photovoltaic device Mar 11, 2014 Issued
Array ( [id] => 10590516 [patent_doc_number] => 09312136 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-12 [patent_title] => 'Replacement metal gate stack for diffusion prevention' [patent_app_type] => utility [patent_app_number] => 14/199045 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 5313 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199045 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/199045
Replacement metal gate stack for diffusion prevention Mar 5, 2014 Issued
Array ( [id] => 10145214 [patent_doc_number] => 09178029 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-11-03 [patent_title] => 'Forming a VTFT gate using printing' [patent_app_type] => utility [patent_app_number] => 14/198677 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 73 [patent_no_of_words] => 19918 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 85 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198677 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198677
Forming a VTFT gate using printing Mar 5, 2014 Issued
Array ( [id] => 10053585 [patent_doc_number] => 09093470 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-07-28 [patent_title] => 'VTFT formation using capillary action' [patent_app_type] => utility [patent_app_number] => 14/198621 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 65 [patent_no_of_words] => 16710 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198621 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198621
VTFT formation using capillary action Mar 5, 2014 Issued
Array ( [id] => 11201030 [patent_doc_number] => 09431250 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-30 [patent_title] => 'Deep well implant using blocking mask' [patent_app_type] => utility [patent_app_number] => 14/199282 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3776 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199282 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/199282
Deep well implant using blocking mask Mar 5, 2014 Issued
Array ( [id] => 11252997 [patent_doc_number] => 09478509 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-10-25 [patent_title] => 'Mechanically anchored backside C4 pad' [patent_app_type] => utility [patent_app_number] => 14/198711 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5362 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198711 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198711
Mechanically anchored backside C4 pad Mar 5, 2014 Issued
Array ( [id] => 10184877 [patent_doc_number] => 09214560 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-15 [patent_title] => 'VTFT including overlapping electrodes' [patent_app_type] => utility [patent_app_number] => 14/198643 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 65 [patent_no_of_words] => 16717 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14198643 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/198643
VTFT including overlapping electrodes Mar 5, 2014 Issued
Array ( [id] => 10370576 [patent_doc_number] => 20150255581 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-09-10 [patent_title] => 'Semiconductor Devices and Methods of Manufacture Thereof' [patent_app_type] => utility [patent_app_number] => 14/199595 [patent_app_country] => US [patent_app_date] => 2014-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4717 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14199595 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/199595
Semiconductor devices and methods of manufacture thereof Mar 5, 2014 Issued
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