Search

Abraham Bahta

Examiner (ID: 12090, Phone: (571)272-1532 , Office: P/2913 )

Most Active Art Unit
2913
Art Unit(s)
1744, 1317, 2923, 1775, 1513, 1774, 2913
Total Applications
4784
Issued Applications
4535
Pending Applications
54
Abandoned Applications
200

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20079174 [patent_doc_number] => 12353238 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-08 [patent_title] => Flexible instruction set architecture supporting varying frequencies [patent_app_type] => utility [patent_app_number] => 17/484399 [patent_app_country] => US [patent_app_date] => 2021-09-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 19 [patent_no_of_words] => 9291 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17484399 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/484399
Flexible instruction set architecture supporting varying frequencies Sep 23, 2021 Issued
Array ( [id] => 20243112 [patent_doc_number] => 12423432 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-09-23 [patent_title] => Bootloaders [patent_app_type] => utility [patent_app_number] => 18/026574 [patent_app_country] => US [patent_app_date] => 2021-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18026574 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/026574
Bootloaders Sep 15, 2021 Issued
Array ( [id] => 18269870 [patent_doc_number] => 20230091112 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SYSTEM AND METHOD FOR CENTRALIZED CONFIGURATION OF DISTRIBUTED AND HETEROGENEOUS APPLICATIONS [patent_app_type] => utility [patent_app_number] => 17/474808 [patent_app_country] => US [patent_app_date] => 2021-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12419 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17474808 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/474808
System and method for centralized configuration of distributed and heterogeneous applications Sep 13, 2021 Issued
Array ( [id] => 17316677 [patent_doc_number] => 20210405726 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-30 [patent_title] => DYNAMIC P2L ASYNCHRONOUS POWER LOSS MITIGATION [patent_app_type] => utility [patent_app_number] => 17/470506 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470506 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470506
Dynamic P2L asynchronous power loss mitigation Sep 8, 2021 Issued
Array ( [id] => 17884961 [patent_doc_number] => 20220300438 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-09-22 [patent_title] => SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM [patent_app_type] => utility [patent_app_number] => 17/470427 [patent_app_country] => US [patent_app_date] => 2021-09-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20712 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 237 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17470427 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/470427
SEMICONDUCTOR MEMORY DEVICE AND MEMORY SYSTEM Sep 8, 2021 Abandoned
Array ( [id] => 18053071 [patent_doc_number] => 11526456 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2022-12-13 [patent_title] => System and method for filtering process i/o operations in kernel-mode [patent_app_type] => utility [patent_app_number] => 17/465286 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4459 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17465286 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/465286
System and method for filtering process i/o operations in kernel-mode Sep 1, 2021 Issued
Array ( [id] => 17446335 [patent_doc_number] => 20220066840 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-03 [patent_title] => DATA PROCESSING [patent_app_type] => utility [patent_app_number] => 17/446796 [patent_app_country] => US [patent_app_date] => 2021-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9671 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446796 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446796
Data processing Sep 1, 2021 Issued
Array ( [id] => 18221880 [patent_doc_number] => 20230060874 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => DYNAMIC QUEUE DEPTH ADJUSTMENT [patent_app_type] => utility [patent_app_number] => 17/463995 [patent_app_country] => US [patent_app_date] => 2021-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8363 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17463995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/463995
Dynamic queue depth adjustment Aug 31, 2021 Issued
Array ( [id] => 17690548 [patent_doc_number] => 20220197841 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-23 [patent_title] => COMMUNICATION CONTROL DEVICE, COMMUNICATION CONTROL METHOD, INFORMATION PROCESSING DEVICE, INFORMATION PROCESSING METHOD, AND COMPUTER PROGRAM PRODUCT [patent_app_type] => utility [patent_app_number] => 17/446433 [patent_app_country] => US [patent_app_date] => 2021-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13952 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17446433 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/446433
Communication control device, communication control method, information processing device, information processing method, and computer program product Aug 29, 2021 Issued
Array ( [id] => 17260793 [patent_doc_number] => 20210373778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-12-02 [patent_title] => METHOD AND APPARATUS FOR FINE TUNING AND OPTIMIZING NVME-OF SSDS [patent_app_type] => utility [patent_app_number] => 17/400988 [patent_app_country] => US [patent_app_date] => 2021-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5450 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17400988 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/400988
Method and apparatus for fine tuning and optimizing NVMe-oF SSDs Aug 11, 2021 Issued
Array ( [id] => 19212300 [patent_doc_number] => 12001362 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Dynamically reprogrammable topologically unique integrated circuit identification [patent_app_type] => utility [patent_app_number] => 17/394536 [patent_app_country] => US [patent_app_date] => 2021-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 93 [patent_figures_cnt] => 95 [patent_no_of_words] => 20715 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 201 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17394536 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/394536
Dynamically reprogrammable topologically unique integrated circuit identification Aug 4, 2021 Issued
Array ( [id] => 17202183 [patent_doc_number] => 20210342278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-04 [patent_title] => MEMORY CARD FOR DATA TRANSFER SYSTEM, DATA STORAGE DEVICE, SYSTEM HOST, AND MEMORY CARD IDENTIFICATION METHOD [patent_app_type] => utility [patent_app_number] => 17/378068 [patent_app_country] => US [patent_app_date] => 2021-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6661 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17378068 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/378068
Memory card for data transfer system, data storage device, system host, and memory card identification method Jul 15, 2021 Issued
Array ( [id] => 18506444 [patent_doc_number] => 11704261 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-18 [patent_title] => System and method for establishing a data connection between a master unit and at least one device unit [patent_app_type] => utility [patent_app_number] => 17/369422 [patent_app_country] => US [patent_app_date] => 2021-07-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 6716 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17369422 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/369422
System and method for establishing a data connection between a master unit and at least one device unit Jul 6, 2021 Issued
Array ( [id] => 18432586 [patent_doc_number] => 11677825 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-06-13 [patent_title] => Optimized communication pathways in a vast storage system [patent_app_type] => utility [patent_app_number] => 17/365163 [patent_app_country] => US [patent_app_date] => 2021-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 15 [patent_no_of_words] => 12702 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17365163 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/365163
Optimized communication pathways in a vast storage system Jun 30, 2021 Issued
Array ( [id] => 17172627 [patent_doc_number] => 20210326297 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-10-21 [patent_title] => LOGIC CIRCUITRY [patent_app_type] => utility [patent_app_number] => 17/364052 [patent_app_country] => US [patent_app_date] => 2021-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9612 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 249 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17364052 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/364052
Logic circuitry Jun 29, 2021 Issued
Array ( [id] => 18098435 [patent_doc_number] => 20220416776 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-29 [patent_title] => Clock Anomaly Detection [patent_app_type] => utility [patent_app_number] => 17/361654 [patent_app_country] => US [patent_app_date] => 2021-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13471 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -30 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17361654 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/361654
Clock anomaly detection Jun 28, 2021 Issued
Array ( [id] => 19827576 [patent_doc_number] => 12248356 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-11 [patent_title] => Techniques to reduce memory power consumption during a system idle state [patent_app_type] => utility [patent_app_number] => 17/359403 [patent_app_country] => US [patent_app_date] => 2021-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 11570 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 236 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17359403 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/359403
Techniques to reduce memory power consumption during a system idle state Jun 24, 2021 Issued
Array ( [id] => 18104110 [patent_doc_number] => 11543996 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-01-03 [patent_title] => Systems and methods for power management in a data storage device [patent_app_type] => utility [patent_app_number] => 17/354005 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7742 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 43 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354005 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354005
Systems and methods for power management in a data storage device Jun 21, 2021 Issued
Array ( [id] => 18079602 [patent_doc_number] => 20220405214 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-12-22 [patent_title] => MEMORY CONTROLLER WITH HYBRID DRAM/PERSISTENT MEMORY CHANNEL ARBITRATION [patent_app_type] => utility [patent_app_number] => 17/354806 [patent_app_country] => US [patent_app_date] => 2021-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8496 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354806 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/354806
Memory controller with hybrid DRAM/persistent memory channel arbitration Jun 21, 2021 Issued
Array ( [id] => 19566232 [patent_doc_number] => 12141002 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Hashboard, power supply system of digital processing device, and digital processing device [patent_app_type] => utility [patent_app_number] => 18/043843 [patent_app_country] => US [patent_app_date] => 2021-06-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 7211 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18043843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/043843
Hashboard, power supply system of digital processing device, and digital processing device Jun 10, 2021 Issued
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