Search

Abu Z. Ghaffari

Examiner (ID: 4367, Phone: (571)270-3799 , Office: P/2195 )

Most Active Art Unit
2195
Art Unit(s)
2195
Total Applications
723
Issued Applications
520
Pending Applications
72
Abandoned Applications
146

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 6460300 [patent_doc_number] => 20020178321 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'PROGRAMMABLE SYSTEM INCLUDING SELF LOCKING MEMORY CIRCUIT FOR A TRISTATE DATA BUS' [patent_app_type] => new [patent_app_number] => 09/401765 [patent_app_country] => US [patent_app_date] => 1999-09-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2358 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0178/20020178321.pdf [firstpage_image] =>[orig_patent_app_number] => 09401765 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/401765
PROGRAMMABLE SYSTEM INCLUDING SELF LOCKING MEMORY CIRCUIT FOR A TRISTATE DATA BUS Sep 22, 1999 Abandoned
Array ( [id] => 1509016 [patent_doc_number] => 06467024 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Accessing data volumes from data storage libraries in a redundant copy synchronization token tracking system' [patent_app_type] => B1 [patent_app_number] => 09/391186 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 7179 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 268 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467024.pdf [firstpage_image] =>[orig_patent_app_number] => 09391186 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391186
Accessing data volumes from data storage libraries in a redundant copy synchronization token tracking system Sep 6, 1999 Issued
Array ( [id] => 1509030 [patent_doc_number] => 06467028 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-10-15 [patent_title] => 'Modulated cache for audio on the web' [patent_app_type] => B1 [patent_app_number] => 09/392770 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3260 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 28 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/467/06467028.pdf [firstpage_image] =>[orig_patent_app_number] => 09392770 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/392770
Modulated cache for audio on the web Sep 6, 1999 Issued
Array ( [id] => 1353043 [patent_doc_number] => 06594723 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-07-15 [patent_title] => 'Method and apparatus for updating data in nonvolatile memory' [patent_app_type] => B1 [patent_app_number] => 09/391134 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5452 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/594/06594723.pdf [firstpage_image] =>[orig_patent_app_number] => 09391134 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/391134
Method and apparatus for updating data in nonvolatile memory Sep 6, 1999 Issued
Array ( [id] => 1513256 [patent_doc_number] => 06442652 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Load based cache control for satellite based CPUs' [patent_app_type] => B1 [patent_app_number] => 09/389737 [patent_app_country] => US [patent_app_date] => 1999-09-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 2785 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442652.pdf [firstpage_image] =>[orig_patent_app_number] => 09389737 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/389737
Load based cache control for satellite based CPUs Sep 6, 1999 Issued
Array ( [id] => 1557550 [patent_doc_number] => 06401179 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-04 [patent_title] => 'Method for storing reference information and apparatus therefor' [patent_app_type] => B1 [patent_app_number] => 09/387904 [patent_app_country] => US [patent_app_date] => 1999-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 3098 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/401/06401179.pdf [firstpage_image] =>[orig_patent_app_number] => 09387904 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/387904
Method for storing reference information and apparatus therefor Aug 31, 1999 Issued
Array ( [id] => 1602240 [patent_doc_number] => 06493796 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-10 [patent_title] => 'Method and apparatus for maintaining consistency of data stored in a group of mirroring devices' [patent_app_type] => B1 [patent_app_number] => 09/388328 [patent_app_country] => US [patent_app_date] => 1999-09-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 14290 [patent_no_of_claims] => 65 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/493/06493796.pdf [firstpage_image] =>[orig_patent_app_number] => 09388328 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/388328
Method and apparatus for maintaining consistency of data stored in a group of mirroring devices Aug 31, 1999 Issued
Array ( [id] => 1444065 [patent_doc_number] => 06496898 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-17 [patent_title] => 'Information record/reproduction device, information record/reproduction method and supply medium thereof' [patent_app_type] => B1 [patent_app_number] => 09/384151 [patent_app_country] => US [patent_app_date] => 1999-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 19 [patent_no_of_words] => 10297 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/496/06496898.pdf [firstpage_image] =>[orig_patent_app_number] => 09384151 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/384151
Information record/reproduction device, information record/reproduction method and supply medium thereof Aug 26, 1999 Issued
Array ( [id] => 1584822 [patent_doc_number] => 06449698 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-10 [patent_title] => 'Method and system for bypass prefetch data path' [patent_app_type] => B1 [patent_app_number] => 09/383743 [patent_app_country] => US [patent_app_date] => 1999-08-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 5425 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/449/06449698.pdf [firstpage_image] =>[orig_patent_app_number] => 09383743 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/383743
Method and system for bypass prefetch data path Aug 25, 1999 Issued
Array ( [id] => 1540590 [patent_doc_number] => 06490669 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-12-03 [patent_title] => 'Memory LSI with compressed data inputting and outputting function' [patent_app_type] => B1 [patent_app_number] => 09/374992 [patent_app_country] => US [patent_app_date] => 1999-08-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5501 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/490/06490669.pdf [firstpage_image] =>[orig_patent_app_number] => 09374992 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/374992
Memory LSI with compressed data inputting and outputting function Aug 15, 1999 Issued
Array ( [id] => 1438667 [patent_doc_number] => 06356978 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-12 [patent_title] => 'File control device' [patent_app_type] => B1 [patent_app_number] => 09/328842 [patent_app_country] => US [patent_app_date] => 1999-07-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 7555 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/356/06356978.pdf [firstpage_image] =>[orig_patent_app_number] => 09328842 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/328842
File control device Jul 7, 1999 Issued
Array ( [id] => 1425262 [patent_doc_number] => 06535963 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2003-03-18 [patent_title] => 'Memory apparatus and method for multicast devices' [patent_app_type] => B1 [patent_app_number] => 09/345709 [patent_app_country] => US [patent_app_date] => 1999-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 6004 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/535/06535963.pdf [firstpage_image] =>[orig_patent_app_number] => 09345709 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/345709
Memory apparatus and method for multicast devices Jun 29, 1999 Issued
Array ( [id] => 1601988 [patent_doc_number] => 06385694 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'High performance load instruction management via system bus with explicit register load and/or cache reload protocols' [patent_app_type] => B1 [patent_app_number] => 09/340079 [patent_app_country] => US [patent_app_date] => 1999-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 8017 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/385/06385694.pdf [firstpage_image] =>[orig_patent_app_number] => 09340079 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340079
High performance load instruction management via system bus with explicit register load and/or cache reload protocols Jun 24, 1999 Issued
Array ( [id] => 1513259 [patent_doc_number] => 06442653 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-08-27 [patent_title] => 'Data processing system, cache, and method that utilize a coherency state to indicate the latency of cached data' [patent_app_type] => B1 [patent_app_number] => 09/339403 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3291 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 91 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/442/06442653.pdf [firstpage_image] =>[orig_patent_app_number] => 09339403 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339403
Data processing system, cache, and method that utilize a coherency state to indicate the latency of cached data Jun 23, 1999 Issued
Array ( [id] => 1481715 [patent_doc_number] => 06345341 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-02-05 [patent_title] => 'Method of cache management for dynamically disabling O state memory-consistent data' [patent_app_type] => B1 [patent_app_number] => 09/339407 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 7189 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/345/06345341.pdf [firstpage_image] =>[orig_patent_app_number] => 09339407 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339407
Method of cache management for dynamically disabling O state memory-consistent data Jun 23, 1999 Issued
Array ( [id] => 1568672 [patent_doc_number] => 06339818 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-01-15 [patent_title] => 'Method and system for dynamically locating frequently accessed memory regions or locations' [patent_app_type] => B1 [patent_app_number] => 09/339711 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 7410 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 9 [patent_words_short_claim] => 16 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/339/06339818.pdf [firstpage_image] =>[orig_patent_app_number] => 09339711 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339711
Method and system for dynamically locating frequently accessed memory regions or locations Jun 23, 1999 Issued
Array ( [id] => 1572425 [patent_doc_number] => 06378058 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-23 [patent_title] => 'Method of and apparatus for processing information, and providing medium' [patent_app_type] => B1 [patent_app_number] => 09/339220 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4407 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/378/06378058.pdf [firstpage_image] =>[orig_patent_app_number] => 09339220 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339220
Method of and apparatus for processing information, and providing medium Jun 23, 1999 Issued
Array ( [id] => 1501559 [patent_doc_number] => 06405290 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-06-11 [patent_title] => 'Multiprocessor system bus protocol for O state memory-consistent data' [patent_app_type] => B1 [patent_app_number] => 09/339404 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6991 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 12 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/405/06405290.pdf [firstpage_image] =>[orig_patent_app_number] => 09339404 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339404
Multiprocessor system bus protocol for O state memory-consistent data Jun 23, 1999 Issued
Array ( [id] => 1592282 [patent_doc_number] => 06360293 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-03-19 [patent_title] => 'Solid state disk system having electrically erasable and programmable read only memory' [patent_app_type] => B1 [patent_app_number] => 09/339206 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 9 [patent_no_of_words] => 3592 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 171 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/360/06360293.pdf [firstpage_image] =>[orig_patent_app_number] => 09339206 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339206
Solid state disk system having electrically erasable and programmable read only memory Jun 23, 1999 Issued
Array ( [id] => 1533177 [patent_doc_number] => 06480948 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-11-12 [patent_title] => 'Configurable system memory map' [patent_app_type] => B1 [patent_app_number] => 09/339638 [patent_app_country] => US [patent_app_date] => 1999-06-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2964 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/480/06480948.pdf [firstpage_image] =>[orig_patent_app_number] => 09339638 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/339638
Configurable system memory map Jun 23, 1999 Issued
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