
Afework S. Demisse
Examiner (ID: 14600, Phone: (571)270-7220 , Office: P/2838 )
| Most Active Art Unit | 2838 |
| Art Unit(s) | 2838 |
| Total Applications | 845 |
| Issued Applications | 785 |
| Pending Applications | 35 |
| Abandoned Applications | 43 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18645653
[patent_doc_number] => 11769732
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-26
[patent_title] => Integrated circuit (IC) with reconstituted die interposer for improved connectivity, and related methods of fabrication
[patent_app_type] => utility
[patent_app_number] => 17/024214
[patent_app_country] => US
[patent_app_date] => 2020-09-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 14
[patent_no_of_words] => 6184
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17024214
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/024214 | Integrated circuit (IC) with reconstituted die interposer for improved connectivity, and related methods of fabrication | Sep 16, 2020 | Issued |
Array
(
[id] => 18032091
[patent_doc_number] => 11515290
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-11-29
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/021112
[patent_app_country] => US
[patent_app_date] => 2020-09-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 20
[patent_figures_cnt] => 20
[patent_no_of_words] => 11497
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17021112
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/021112 | Semiconductor package | Sep 14, 2020 | Issued |
Array
(
[id] => 16904869
[patent_doc_number] => 20210183785
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/019519
[patent_app_country] => US
[patent_app_date] => 2020-09-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8957
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17019519
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/019519 | Semiconductor package | Sep 13, 2020 | Issued |
Array
(
[id] => 17590755
[patent_doc_number] => 11329032
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-05-10
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/018324
[patent_app_country] => US
[patent_app_date] => 2020-09-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 19
[patent_figures_cnt] => 19
[patent_no_of_words] => 10578
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 158
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17018324
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/018324 | Semiconductor device | Sep 10, 2020 | Issued |
Array
(
[id] => 17070696
[patent_doc_number] => 20210272913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => SEMICONDUCTOR PACKAGE
[patent_app_type] => utility
[patent_app_number] => 17/016123
[patent_app_country] => US
[patent_app_date] => 2020-09-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8490
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17016123
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/016123 | Semiconductor package | Sep 8, 2020 | Issued |
Array
(
[id] => 16586278
[patent_doc_number] => 20210020680
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-01-21
[patent_title] => SEMICONDUCTOR PACKAGE AND CAMERA MODULE
[patent_app_type] => utility
[patent_app_number] => 17/001738
[patent_app_country] => US
[patent_app_date] => 2020-08-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6360
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17001738
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/001738 | Semiconductor package and camera module | Aug 24, 2020 | Issued |
Array
(
[id] => 17862960
[patent_doc_number] => 11444122
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-13
[patent_title] => Semiconductor memory device and semiconductor memory manufacturing apparatus
[patent_app_type] => utility
[patent_app_number] => 16/989875
[patent_app_country] => US
[patent_app_date] => 2020-08-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 25
[patent_no_of_words] => 10802
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16989875
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/989875 | Semiconductor memory device and semiconductor memory manufacturing apparatus | Aug 9, 2020 | Issued |
Array
(
[id] => 19358374
[patent_doc_number] => 12058857
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-08-06
[patent_title] => Three-dimensional memory devices with drain select gate cut and methods for forming and operating the same
[patent_app_type] => utility
[patent_app_number] => 16/944883
[patent_app_country] => US
[patent_app_date] => 2020-07-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 27
[patent_no_of_words] => 17803
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16944883
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/944883 | Three-dimensional memory devices with drain select gate cut and methods for forming and operating the same | Jul 30, 2020 | Issued |
Array
(
[id] => 16440412
[patent_doc_number] => 20200357739
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 16/940822
[patent_app_country] => US
[patent_app_date] => 2020-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 19833
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16940822
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/940822 | Semiconductor device and manufacturing method thereof | Jul 27, 2020 | Issued |
Array
(
[id] => 17373749
[patent_doc_number] => 20220028801
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-27
[patent_title] => SEMICONDUCTOR DEVICE PACKAGE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/938818
[patent_app_country] => US
[patent_app_date] => 2020-07-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11555
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16938818
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/938818 | Semiconductor device package and method for manufacturing the same | Jul 23, 2020 | Issued |
Array
(
[id] => 18688406
[patent_doc_number] => 11784151
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-10
[patent_title] => Redistribution layer connection
[patent_app_type] => utility
[patent_app_number] => 16/936263
[patent_app_country] => US
[patent_app_date] => 2020-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 29
[patent_no_of_words] => 5218
[patent_no_of_claims] => 30
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16936263
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/936263 | Redistribution layer connection | Jul 21, 2020 | Issued |
Array
(
[id] => 18706471
[patent_doc_number] => 11793003
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Semiconductor structure with embedded memory device
[patent_app_type] => utility
[patent_app_number] => 16/926239
[patent_app_country] => US
[patent_app_date] => 2020-07-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 16
[patent_figures_cnt] => 19
[patent_no_of_words] => 11654
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 93
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16926239
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/926239 | Semiconductor structure with embedded memory device | Jul 9, 2020 | Issued |
Array
(
[id] => 17010999
[patent_doc_number] => 20210242160
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => INTEGRATED CIRCUIT (IC) PACKAGES EMPLOYING A THERMAL CONDUCTIVE PACKAGE SUBSTRATE WITH DIE REGION SPLIT, AND RELATED FABRICATION METHODS
[patent_app_type] => utility
[patent_app_number] => 16/921152
[patent_app_country] => US
[patent_app_date] => 2020-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11644
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -27
[patent_words_short_claim] => 118
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16921152
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/921152 | Integrated circuit (IC) packages employing a thermal conductive package substrate with die region split, and related fabrication methods | Jul 5, 2020 | Issued |
Array
(
[id] => 16394603
[patent_doc_number] => 20200335544
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-10-22
[patent_title] => MULTI-CHIP PACKAGING STRUCTURE FOR AN IMAGE SENSOR
[patent_app_type] => utility
[patent_app_number] => 16/946768
[patent_app_country] => US
[patent_app_date] => 2020-07-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16946768
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/946768 | Multi-chip packaging structure for an image sensor | Jul 5, 2020 | Issued |
Array
(
[id] => 16677384
[patent_doc_number] => 20210066150
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-03-04
[patent_title] => SEMICONDUCTOR DEVICE AND SEMICONDUCTOR ELEMENT
[patent_app_type] => utility
[patent_app_number] => 16/905733
[patent_app_country] => US
[patent_app_date] => 2020-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5526
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16905733
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/905733 | Semiconductor device and semiconductor element | Jun 17, 2020 | Issued |
Array
(
[id] => 17262781
[patent_doc_number] => 20210375766
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-02
[patent_title] => SEMICONDUCTR DEVICE, STACKED SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD OF SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/885282
[patent_app_country] => US
[patent_app_date] => 2020-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8483
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 64
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16885282
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/885282 | Semiconductor device, stacked semiconductor device and manufacturing method of semiconductor device | May 27, 2020 | Issued |
Array
(
[id] => 16905154
[patent_doc_number] => 20210184070
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-06-17
[patent_title] => METHOD OF ALIGNING MICRO LEDs AND METHOD OF MANUFACTURING MICRO LED DISPLAY USING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/883363
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6921
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883363
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/883363 | Method of aligning micro LEDs and method of manufacturing micro LED display using the same | May 25, 2020 | Issued |
Array
(
[id] => 17493512
[patent_doc_number] => 11282829
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-03-22
[patent_title] => Integrated circuit with mixed row heights
[patent_app_type] => utility
[patent_app_number] => 16/883740
[patent_app_country] => US
[patent_app_date] => 2020-05-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 27
[patent_figures_cnt] => 27
[patent_no_of_words] => 17962
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 146
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16883740
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/883740 | Integrated circuit with mixed row heights | May 25, 2020 | Issued |
Array
(
[id] => 17730820
[patent_doc_number] => 11387222
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-12
[patent_title] => Integrated circuit package and method
[patent_app_type] => utility
[patent_app_number] => 16/882054
[patent_app_country] => US
[patent_app_date] => 2020-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 33
[patent_figures_cnt] => 33
[patent_no_of_words] => 16060
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16882054
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/882054 | Integrated circuit package and method | May 21, 2020 | Issued |
Array
(
[id] => 16456090
[patent_doc_number] => 20200365516
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-19
[patent_title] => WIRING SUBSTRATE AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/868666
[patent_app_country] => US
[patent_app_date] => 2020-05-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9687
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -6
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16868666
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/868666 | Wiring substrate and electronic device | May 6, 2020 | Issued |