Search

Agnieszka Boesen

Examiner (ID: 9245, Phone: (571)272-8035 , Office: P/1648 )

Most Active Art Unit
1648
Art Unit(s)
1672, 1648, 1671
Total Applications
1047
Issued Applications
610
Pending Applications
117
Abandoned Applications
352

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19116377 [patent_doc_number] => 20240128127 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/398190 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18398190 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/398190
Semiconductor device and method for fabricating the same Dec 27, 2023 Issued
Array ( [id] => 19116372 [patent_doc_number] => 20240128122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-04-18 [patent_title] => SEMICONDUCTOR PACKAGE [patent_app_type] => utility [patent_app_number] => 18/395706 [patent_app_country] => US [patent_app_date] => 2023-12-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13298 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395706 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/395706
Semiconductor package Dec 24, 2023 Issued
Array ( [id] => 19781588 [patent_doc_number] => 12230626 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Transistor [patent_app_type] => utility [patent_app_number] => 18/536767 [patent_app_country] => US [patent_app_date] => 2023-12-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 28 [patent_no_of_words] => 10863 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18536767 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/536767
Transistor Dec 11, 2023 Issued
Array ( [id] => 19704969 [patent_doc_number] => 12199016 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Semiconductor device [patent_app_type] => utility [patent_app_number] => 18/529096 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 12162 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18529096 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/529096
Semiconductor device Dec 4, 2023 Issued
Array ( [id] => 19176314 [patent_doc_number] => 20240162288 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-16 [patent_title] => Ultra-High Voltage Resistor with Voltage Sense [patent_app_type] => utility [patent_app_number] => 18/523515 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4459 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18523515 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/523515
Ultra-high voltage resistor with voltage sense Nov 28, 2023 Issued
Array ( [id] => 19900220 [patent_doc_number] => 12278156 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-15 [patent_title] => Semiconductor package [patent_app_type] => utility [patent_app_number] => 18/522601 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 29 [patent_no_of_words] => 4470 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522601 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522601
Semiconductor package Nov 28, 2023 Issued
Array ( [id] => 19071090 [patent_doc_number] => 20240105516 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => ASYMMETRIC SOURCE/DRAIN EPITAXY [patent_app_type] => utility [patent_app_number] => 18/520247 [patent_app_country] => US [patent_app_date] => 2023-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12946 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18520247 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/520247
Asymmetric source/drain epitaxy Nov 26, 2023 Issued
Array ( [id] => 19054787 [patent_doc_number] => 20240096756 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => MEHTOD OF MAKING SEMICONDUCTOR DEVICE HAVING SELF-ALIGNED INTERCONNECT STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/517298 [patent_app_country] => US [patent_app_date] => 2023-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16133 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18517298 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/517298
Method of making semiconductor device having self-aligned interconnect structure Nov 21, 2023 Issued
Array ( [id] => 19783279 [patent_doc_number] => 12232334 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-02-18 [patent_title] => Semiconductor memory devices and methods of manufacturing thereof [patent_app_type] => utility [patent_app_number] => 18/516521 [patent_app_country] => US [patent_app_date] => 2023-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 11810 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 146 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18516521 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/516521
Semiconductor memory devices and methods of manufacturing thereof Nov 20, 2023 Issued
Array ( [id] => 19038391 [patent_doc_number] => 20240088206 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/515152 [patent_app_country] => US [patent_app_date] => 2023-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5892 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18515152 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/515152
SEMICONDUCTOR STRUCTURE Nov 19, 2023 Pending
Array ( [id] => 19664330 [patent_doc_number] => 12178034 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-12-24 [patent_title] => Semiconductor device including buried contact and method for manufacturing the same [patent_app_type] => utility [patent_app_number] => 18/501576 [patent_app_country] => US [patent_app_date] => 2023-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 40 [patent_figures_cnt] => 40 [patent_no_of_words] => 7334 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18501576 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/501576
Semiconductor device including buried contact and method for manufacturing the same Nov 2, 2023 Issued
Array ( [id] => 18991052 [patent_doc_number] => 20240063021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-22 [patent_title] => Diamond Semiconductor System And Method [patent_app_type] => utility [patent_app_number] => 18/498756 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12347 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -8 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498756 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498756
Diamond semiconductor system and method Oct 30, 2023 Issued
Array ( [id] => 19981973 [patent_doc_number] => 12349475 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-01 [patent_title] => Integrated circuit having vertical routing to bond pads [patent_app_type] => utility [patent_app_number] => 18/494163 [patent_app_country] => US [patent_app_date] => 2023-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 168 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18494163 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/494163
Integrated circuit having vertical routing to bond pads Oct 24, 2023 Issued
Array ( [id] => 18884891 [patent_doc_number] => 20240008260 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SEMICONDUCTOR DEVICES HAVING CONTACT PLUGS [patent_app_type] => utility [patent_app_number] => 18/368939 [patent_app_country] => US [patent_app_date] => 2023-09-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12383 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18368939 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/368939
Semiconductor devices having contact plugs Sep 14, 2023 Issued
Array ( [id] => 18851173 [patent_doc_number] => 20230413577 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => Multilayered Seed for Perpendicular Magnetic Structure Including an Oxide Layer [patent_app_type] => utility [patent_app_number] => 18/241856 [patent_app_country] => US [patent_app_date] => 2023-09-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18241856 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/241856
Multilayered seed for perpendicular magnetic structure including an oxide layer Sep 1, 2023 Issued
Array ( [id] => 19812409 [patent_doc_number] => 12243822 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-04 [patent_title] => Method of manufacturing integrated circuit [patent_app_type] => utility [patent_app_number] => 18/447572 [patent_app_country] => US [patent_app_date] => 2023-08-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 31 [patent_no_of_words] => 23255 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18447572 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/447572
Method of manufacturing integrated circuit Aug 9, 2023 Issued
Array ( [id] => 19918583 [patent_doc_number] => 12293959 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Through-circuit Vias in interconnect structures [patent_app_type] => utility [patent_app_number] => 18/232200 [patent_app_country] => US [patent_app_date] => 2023-08-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 47 [patent_figures_cnt] => 47 [patent_no_of_words] => 6065 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18232200 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/232200
Through-circuit Vias in interconnect structures Aug 8, 2023 Issued
Array ( [id] => 18787792 [patent_doc_number] => 20230376149 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/365388 [patent_app_country] => US [patent_app_date] => 2023-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14709 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18365388 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/365388
Display device Aug 3, 2023 Issued
Array ( [id] => 18789640 [patent_doc_number] => 20230378344 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/364082 [patent_app_country] => US [patent_app_date] => 2023-08-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12690 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 385 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18364082 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/364082
Semiconductor device and method of manufacturing the same Aug 1, 2023 Issued
Array ( [id] => 19567882 [patent_doc_number] => 12142663 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-11-12 [patent_title] => Method for forming source/drain contacts [patent_app_type] => utility [patent_app_number] => 18/357823 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 22 [patent_no_of_words] => 7064 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357823 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357823
Method for forming source/drain contacts Jul 23, 2023 Issued
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