Search

Aimee J. Li

Supervisory Patent Examiner (ID: 5820, Phone: (571)272-4169 , Office: P/2183 )

Most Active Art Unit
2183
Art Unit(s)
2183, 2100, 2137, 2195
Total Applications
539
Issued Applications
378
Pending Applications
21
Abandoned Applications
140

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7328735 [patent_doc_number] => 20040139306 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-15 [patent_title] => 'Partial and start-over threads in embedded real-time kernel' [patent_app_type] => new [patent_app_number] => 10/339954 [patent_app_country] => US [patent_app_date] => 2003-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7080 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 31 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0139/20040139306.pdf [firstpage_image] =>[orig_patent_app_number] => 10339954 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/339954
Partial and start-over threads in embedded real-time kernel Jan 8, 2003 Issued
Array ( [id] => 7673546 [patent_doc_number] => 20040128572 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Apparatus and method for driving and routing source operands to execution units in layout stacks' [patent_app_type] => new [patent_app_number] => 10/331604 [patent_app_country] => US [patent_app_date] => 2002-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 3801 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20040128572.pdf [firstpage_image] =>[orig_patent_app_number] => 10331604 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/331604
Apparatus and method for driving and routing source operands to execution units in layout stacks Dec 30, 2002 Abandoned
Array ( [id] => 7673634 [patent_doc_number] => 20040128484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-07-01 [patent_title] => 'Method and apparatus for transparent delayed write-back' [patent_app_type] => new [patent_app_number] => 10/330183 [patent_app_country] => US [patent_app_date] => 2002-12-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4842 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0128/20040128484.pdf [firstpage_image] =>[orig_patent_app_number] => 10330183 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/330183
Method and apparatus for transparent delayed write-back Dec 29, 2002 Abandoned
Array ( [id] => 7476984 [patent_doc_number] => 20040098563 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2004-05-20 [patent_title] => 'Coprocessor extension architecture built using a novel split-instruction transaction model' [patent_app_type] => new [patent_app_number] => 10/299120 [patent_app_country] => US [patent_app_date] => 2002-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6327 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0098/20040098563.pdf [firstpage_image] =>[orig_patent_app_number] => 10299120 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/299120
Coprocessor extension architecture built using a novel split-instruction transaction model Nov 18, 2002 Issued
Array ( [id] => 604871 [patent_doc_number] => 07434036 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-10-07 [patent_title] => 'System and method for executing software program instructions using a condition specified within a conditional execution instruction' [patent_app_type] => utility [patent_app_number] => 10/231948 [patent_app_country] => US [patent_app_date] => 2002-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 5803 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/434/07434036.pdf [firstpage_image] =>[orig_patent_app_number] => 10231948 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/231948
System and method for executing software program instructions using a condition specified within a conditional execution instruction Aug 29, 2002 Issued
Array ( [id] => 379022 [patent_doc_number] => 07313676 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-12-25 [patent_title] => 'Register renaming for dynamic multi-threading' [patent_app_type] => utility [patent_app_number] => 10/184250 [patent_app_country] => US [patent_app_date] => 2002-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3710 [patent_no_of_claims] => 30 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/313/07313676.pdf [firstpage_image] =>[orig_patent_app_number] => 10184250 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/184250
Register renaming for dynamic multi-threading Jun 25, 2002 Issued
10/031332 Processor architecture for an efficient execution of functional languages May 8, 2002 Abandoned
Array ( [id] => 6798467 [patent_doc_number] => 20030177342 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-09-18 [patent_title] => 'Processor with register dirty bits and special save multiple/return instructions' [patent_app_type] => new [patent_app_number] => 10/099268 [patent_app_country] => US [patent_app_date] => 2002-03-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2898 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0177/20030177342.pdf [firstpage_image] =>[orig_patent_app_number] => 10099268 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/099268
Processor with register dirty bits and special save multiple/return instructions Mar 14, 2002 Abandoned
Array ( [id] => 6484902 [patent_doc_number] => 20020152367 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-10-17 [patent_title] => 'SIMD digital signal processor and arithmetic method for the same' [patent_app_type] => new [patent_app_number] => 10/092643 [patent_app_country] => US [patent_app_date] => 2002-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2001 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0152/20020152367.pdf [firstpage_image] =>[orig_patent_app_number] => 10092643 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/092643
SIMD digital signal processor and arithmetic method for the same Mar 4, 2002 Abandoned
Array ( [id] => 836267 [patent_doc_number] => 07398374 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-07-08 [patent_title] => 'Multi-cluster processor for processing instructions of one or more instruction threads' [patent_app_type] => utility [patent_app_number] => 10/083872 [patent_app_country] => US [patent_app_date] => 2002-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1816 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/398/07398374.pdf [firstpage_image] =>[orig_patent_app_number] => 10083872 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/083872
Multi-cluster processor for processing instructions of one or more instruction threads Feb 26, 2002 Issued
Array ( [id] => 6425041 [patent_doc_number] => 20020184471 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-12-05 [patent_title] => 'Semiconductor integrated circuit and computer-readable recording medium' [patent_app_type] => new [patent_app_number] => 10/080578 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8900 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0184/20020184471.pdf [firstpage_image] =>[orig_patent_app_number] => 10080578 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/080578
Semiconductor integrated circuit and computer-readable recording medium Feb 24, 2002 Abandoned
Array ( [id] => 873511 [patent_doc_number] => 07366884 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2008-04-29 [patent_title] => 'Context switching system for a multi-thread execution pipeline loop and method of operation thereof' [patent_app_type] => utility [patent_app_number] => 10/082776 [patent_app_country] => US [patent_app_date] => 2002-02-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7412 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/366/07366884.pdf [firstpage_image] =>[orig_patent_app_number] => 10082776 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/082776
Context switching system for a multi-thread execution pipeline loop and method of operation thereof Feb 24, 2002 Issued
Array ( [id] => 518432 [patent_doc_number] => 07203817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2007-04-10 [patent_title] => 'Power consumption reduction in a pipeline by stalling instruction issue on a load miss' [patent_app_type] => utility [patent_app_number] => 10/067038 [patent_app_country] => US [patent_app_date] => 2002-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 18989 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/203/07203817.pdf [firstpage_image] =>[orig_patent_app_number] => 10067038 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/067038
Power consumption reduction in a pipeline by stalling instruction issue on a load miss Feb 3, 2002 Issued
Array ( [id] => 6675862 [patent_doc_number] => 20030061465 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-03-27 [patent_title] => 'Issue and retirement mechanism in processor having different pipeline lenghths' [patent_app_type] => new [patent_app_number] => 10/066984 [patent_app_country] => US [patent_app_date] => 2002-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 19242 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0061/20030061465.pdf [firstpage_image] =>[orig_patent_app_number] => 10066984 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/066984
Inhibiting of a co-issuing instruction in a processor having different pipeline lengths Feb 3, 2002 Issued
Array ( [id] => 586602 [patent_doc_number] => 07467287 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2008-12-16 [patent_title] => 'Method and apparatus for vector table look-up' [patent_app_type] => utility [patent_app_number] => 10/038478 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45630 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/467/07467287.pdf [firstpage_image] =>[orig_patent_app_number] => 10038478 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038478
Method and apparatus for vector table look-up Dec 30, 2001 Issued
Array ( [id] => 1001738 [patent_doc_number] => 06912648 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-06-28 [patent_title] => 'Stick and spoke replay with selectable delays' [patent_app_type] => utility [patent_app_number] => 10/039598 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8691 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/912/06912648.pdf [firstpage_image] =>[orig_patent_app_number] => 10039598 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039598
Stick and spoke replay with selectable delays Dec 30, 2001 Issued
Array ( [id] => 721706 [patent_doc_number] => 07055018 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2006-05-30 [patent_title] => 'Apparatus for parallel vector table look-up' [patent_app_type] => utility [patent_app_number] => 10/038351 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45730 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/055/07055018.pdf [firstpage_image] =>[orig_patent_app_number] => 10038351 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038351
Apparatus for parallel vector table look-up Dec 30, 2001 Issued
Array ( [id] => 279914 [patent_doc_number] => 07558947 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2009-07-07 [patent_title] => 'Method and apparatus for computing vector absolute differences' [patent_app_type] => utility [patent_app_number] => 10/038431 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 101 [patent_figures_cnt] => 102 [patent_no_of_words] => 45492 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 206 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/07/558/07558947.pdf [firstpage_image] =>[orig_patent_app_number] => 10038431 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/038431
Method and apparatus for computing vector absolute differences Dec 30, 2001 Issued
Array ( [id] => 962212 [patent_doc_number] => 06952764 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-04 [patent_title] => 'Stopping replay tornadoes' [patent_app_type] => utility [patent_app_number] => 10/039588 [patent_app_country] => US [patent_app_date] => 2001-12-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 8167 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/952/06952764.pdf [firstpage_image] =>[orig_patent_app_number] => 10039588 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/039588
Stopping replay tornadoes Dec 30, 2001 Issued
Array ( [id] => 6763047 [patent_doc_number] => 20030126409 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2003-07-03 [patent_title] => 'Store sets poison propagation' [patent_app_type] => new [patent_app_number] => 10/034219 [patent_app_country] => US [patent_app_date] => 2001-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5235 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20030126409.pdf [firstpage_image] =>[orig_patent_app_number] => 10034219 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/034219
Store sets poison propagation Dec 27, 2001 Abandoned
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