Search

Aiqun Li

Examiner (ID: 3811, Phone: (571)270-7736 , Office: P/1768 )

Most Active Art Unit
1768
Art Unit(s)
1796, 1763, 1768, 1766
Total Applications
951
Issued Applications
565
Pending Applications
85
Abandoned Applications
319

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 4376650 [patent_doc_number] => 06288436 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-09-11 [patent_title] => 'Mixed fuse technologies' [patent_app_type] => 1 [patent_app_number] => 9/361960 [patent_app_country] => US [patent_app_date] => 1999-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 2546 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/288/06288436.pdf [firstpage_image] =>[orig_patent_app_number] => 361960 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/361960
Mixed fuse technologies Jul 26, 1999 Issued
Array ( [id] => 4140103 [patent_doc_number] => 06121684 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-09-19 [patent_title] => 'Integrated butt contact having a protective spacer' [patent_app_type] => 1 [patent_app_number] => 9/359885 [patent_app_country] => US [patent_app_date] => 1999-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4125 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 192 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/121/06121684.pdf [firstpage_image] =>[orig_patent_app_number] => 359885 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/359885
Integrated butt contact having a protective spacer Jul 25, 1999 Issued
Array ( [id] => 4266088 [patent_doc_number] => 06259151 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-07-10 [patent_title] => 'Use of barrier refractive or anti-reflective layer to improve laser trim characteristics of thin film resistors' [patent_app_type] => 1 [patent_app_number] => 9/358266 [patent_app_country] => US [patent_app_date] => 1999-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 2 [patent_no_of_words] => 1804 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/259/06259151.pdf [firstpage_image] =>[orig_patent_app_number] => 358266 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/358266
Use of barrier refractive or anti-reflective layer to improve laser trim characteristics of thin film resistors Jul 20, 1999 Issued
Array ( [id] => 4274918 [patent_doc_number] => 06307228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Semiconductor device with perovskite capacitor and its manufacture method' [patent_app_type] => 1 [patent_app_number] => 9/357805 [patent_app_country] => US [patent_app_date] => 1999-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 18 [patent_no_of_words] => 3496 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 217 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307228.pdf [firstpage_image] =>[orig_patent_app_number] => 357805 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/357805
Semiconductor device with perovskite capacitor and its manufacture method Jul 19, 1999 Issued
Array ( [id] => 1116970 [patent_doc_number] => 06800929 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-10-05 [patent_title] => 'Semiconductor device' [patent_app_type] => B1 [patent_app_number] => 09/351160 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 30 [patent_no_of_words] => 7248 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/800/06800929.pdf [firstpage_image] =>[orig_patent_app_number] => 09351160 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351160
Semiconductor device Jul 11, 1999 Issued
Array ( [id] => 4275201 [patent_doc_number] => 06307247 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-23 [patent_title] => 'Monolithic low dielectric constant platform for passive components and method' [patent_app_type] => 1 [patent_app_number] => 9/351714 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4034 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 92 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/307/06307247.pdf [firstpage_image] =>[orig_patent_app_number] => 351714 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351714
Monolithic low dielectric constant platform for passive components and method Jul 11, 1999 Issued
Array ( [id] => 6577378 [patent_doc_number] => 20020040997 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-04-11 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => new [patent_app_number] => 09/351134 [patent_app_country] => US [patent_app_date] => 1999-07-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2857 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0040/20020040997.pdf [firstpage_image] =>[orig_patent_app_number] => 09351134 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/351134
Semiconductor device with protective element Jul 11, 1999 Issued
Array ( [id] => 1351665 [patent_doc_number] => 06580113 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2003-06-17 [patent_title] => 'Semiconductor device and manufacturing method thereof' [patent_app_type] => B2 [patent_app_number] => 09/340394 [patent_app_country] => US [patent_app_date] => 1999-06-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 35 [patent_no_of_words] => 7639 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/580/06580113.pdf [firstpage_image] =>[orig_patent_app_number] => 09340394 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/340394
Semiconductor device and manufacturing method thereof Jun 27, 1999 Issued
Array ( [id] => 4179778 [patent_doc_number] => 06084276 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-07-04 [patent_title] => 'Threshold voltage tailoring of corner of MOSFET device' [patent_app_type] => 1 [patent_app_number] => 9/337904 [patent_app_country] => US [patent_app_date] => 1999-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 8853 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/084/06084276.pdf [firstpage_image] =>[orig_patent_app_number] => 337904 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/337904
Threshold voltage tailoring of corner of MOSFET device Jun 21, 1999 Issued
Array ( [id] => 6427449 [patent_doc_number] => 20020175380 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-11-28 [patent_title] => 'CMOS WITH A FIXED CHARGE IN THE GATE DIELECTRIC' [patent_app_type] => new [patent_app_number] => 09/324805 [patent_app_country] => US [patent_app_date] => 1999-06-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 5629 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0175/20020175380.pdf [firstpage_image] =>[orig_patent_app_number] => 09324805 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/324805
CMOS with a fixed charge in the gate dielectric Jun 2, 1999 Issued
Array ( [id] => 1547421 [patent_doc_number] => 06445031 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-09-03 [patent_title] => 'Byte-switch structure for EEPROM memories' [patent_app_type] => B1 [patent_app_number] => 09/322454 [patent_app_country] => US [patent_app_date] => 1999-05-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 15 [patent_no_of_words] => 4115 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/445/06445031.pdf [firstpage_image] =>[orig_patent_app_number] => 09322454 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/322454
Byte-switch structure for EEPROM memories May 27, 1999 Issued
Array ( [id] => 1486823 [patent_doc_number] => 06365971 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-04-02 [patent_title] => 'Unlanded vias with a low dielectric constant material as an intraline dielectric' [patent_app_type] => B1 [patent_app_number] => 09/318704 [patent_app_country] => US [patent_app_date] => 1999-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 14 [patent_no_of_words] => 2856 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/365/06365971.pdf [firstpage_image] =>[orig_patent_app_number] => 09318704 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/318704
Unlanded vias with a low dielectric constant material as an intraline dielectric May 25, 1999 Issued
Array ( [id] => 1132604 [patent_doc_number] => 06787911 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2004-09-07 [patent_title] => 'Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing' [patent_app_type] => B1 [patent_app_number] => 09/317536 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 39 [patent_no_of_words] => 6221 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/787/06787911.pdf [firstpage_image] =>[orig_patent_app_number] => 09317536 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317536
Interconnect with low dielectric constant insulators for semiconductor integrated circuit manufacturing May 23, 1999 Issued
Array ( [id] => 4209862 [patent_doc_number] => 06078076 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-06-20 [patent_title] => 'Vertical channels in split-gate flash memory cell' [patent_app_type] => 1 [patent_app_number] => 9/317645 [patent_app_country] => US [patent_app_date] => 1999-05-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 17 [patent_no_of_words] => 4067 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 245 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/078/06078076.pdf [firstpage_image] =>[orig_patent_app_number] => 317645 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/317645
Vertical channels in split-gate flash memory cell May 23, 1999 Issued
Array ( [id] => 4089844 [patent_doc_number] => 06163075 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-12-19 [patent_title] => 'Multilayer wiring structure and semiconductor device having the same, and manufacturing method therefor' [patent_app_type] => 1 [patent_app_number] => 9/315825 [patent_app_country] => US [patent_app_date] => 1999-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 37 [patent_no_of_words] => 6810 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/163/06163075.pdf [firstpage_image] =>[orig_patent_app_number] => 315825 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315825
Multilayer wiring structure and semiconductor device having the same, and manufacturing method therefor May 20, 1999 Issued
Array ( [id] => 1597197 [patent_doc_number] => 06384480 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2002-05-07 [patent_title] => 'Formation of electrical contacts to conductive elements in the fabrication of semiconductor integrated circuits' [patent_app_type] => B1 [patent_app_number] => 09/315455 [patent_app_country] => US [patent_app_date] => 1999-05-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 14 [patent_no_of_words] => 4264 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 174 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/384/06384480.pdf [firstpage_image] =>[orig_patent_app_number] => 09315455 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/315455
Formation of electrical contacts to conductive elements in the fabrication of semiconductor integrated circuits May 19, 1999 Issued
Array ( [id] => 4413905 [patent_doc_number] => 06300681 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-10-09 [patent_title] => 'Semiconductor device and method for forming the same' [patent_app_type] => 1 [patent_app_number] => 9/313196 [patent_app_country] => US [patent_app_date] => 1999-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 5 [patent_no_of_words] => 2187 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/300/06300681.pdf [firstpage_image] =>[orig_patent_app_number] => 313196 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/313196
Semiconductor device and method for forming the same May 17, 1999 Issued
Array ( [id] => 4293986 [patent_doc_number] => 06211545 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2001-04-03 [patent_title] => 'Device fabricated by a method of controlling outdiffusion from a doped three-dimensional film' [patent_app_type] => 1 [patent_app_number] => 9/310515 [patent_app_country] => US [patent_app_date] => 1999-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 3184 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/211/06211545.pdf [firstpage_image] =>[orig_patent_app_number] => 310515 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/310515
Device fabricated by a method of controlling outdiffusion from a doped three-dimensional film May 11, 1999 Issued
Array ( [id] => 4242830 [patent_doc_number] => 06144086 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 2000-11-07 [patent_title] => 'Structure for improved latch-up using dual depth STI with impurity implant' [patent_app_type] => 1 [patent_app_number] => 9/303156 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 4173 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/144/06144086.pdf [firstpage_image] =>[orig_patent_app_number] => 303156 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/303156
Structure for improved latch-up using dual depth STI with impurity implant Apr 29, 1999 Issued
Array ( [id] => 1561085 [patent_doc_number] => 06375159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2002-04-23 [patent_title] => 'High laser absorption copper fuse and method for making the same' [patent_app_type] => B2 [patent_app_number] => 09/302915 [patent_app_country] => US [patent_app_date] => 1999-04-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3756 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/375/06375159.pdf [firstpage_image] =>[orig_patent_app_number] => 09302915 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/302915
High laser absorption copper fuse and method for making the same Apr 29, 1999 Issued
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