Search

Ajay Arora

Examiner (ID: 4150, Phone: (571)272-8347 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2892, 2811
Total Applications
1236
Issued Applications
1005
Pending Applications
90
Abandoned Applications
181

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19712671 [patent_doc_number] => 20250022813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-16 [patent_title] => MULTIDIE SUPPORTS AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/902442 [patent_app_country] => US [patent_app_date] => 2024-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8357 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 61 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18902442 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/902442
MULTIDIE SUPPORTS AND RELATED METHODS Sep 29, 2024 Pending
Array ( [id] => 19589750 [patent_doc_number] => 20240387307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789496 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789496 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789496
SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME Jul 29, 2024 Pending
Array ( [id] => 19589750 [patent_doc_number] => 20240387307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789496 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789496 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789496
SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME Jul 29, 2024 Pending
Array ( [id] => 19589750 [patent_doc_number] => 20240387307 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-21 [patent_title] => SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/789496 [patent_app_country] => US [patent_app_date] => 2024-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18789496 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/789496
SEMICONDUCTOR PACKAGE WITH STIFFENER STRUCTURE AND METHOD OF MANUFACTURING THE SAME Jul 29, 2024 Pending
Array ( [id] => 19546559 [patent_doc_number] => 20240363595 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-31 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 18/770232 [patent_app_country] => US [patent_app_date] => 2024-07-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 52575 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 650 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18770232 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/770232
POWER MODULE Jul 10, 2024 Pending
Array ( [id] => 20132237 [patent_doc_number] => 12374555 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Die sidewall coatings and related methods [patent_app_type] => utility [patent_app_number] => 18/742204 [patent_app_country] => US [patent_app_date] => 2024-06-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 30 [patent_figures_cnt] => 122 [patent_no_of_words] => 29141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18742204 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/742204
Die sidewall coatings and related methods Jun 12, 2024 Issued
Array ( [id] => 19392809 [patent_doc_number] => 20240282679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => METHODS OF FORMING PACKAGED SEMICONDUCTOR DEVICES AND LEADFRAMES FOR SEMICONDUCTOR DEVICE PACKAGES [patent_app_type] => utility [patent_app_number] => 18/654125 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654125
Packaged semiconductor devices with leadframes having tie bar with recessed cavity May 2, 2024 Issued
Array ( [id] => 19392809 [patent_doc_number] => 20240282679 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => METHODS OF FORMING PACKAGED SEMICONDUCTOR DEVICES AND LEADFRAMES FOR SEMICONDUCTOR DEVICE PACKAGES [patent_app_type] => utility [patent_app_number] => 18/654125 [patent_app_country] => US [patent_app_date] => 2024-05-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4921 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 36 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18654125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/654125
Packaged semiconductor devices with leadframes having tie bar with recessed cavity May 2, 2024 Issued
Array ( [id] => 20113393 [patent_doc_number] => 12364150 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Display apparatus with penetrating portion and method of manufacturing same [patent_app_type] => utility [patent_app_number] => 18/637063 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 18 [patent_no_of_words] => 1018 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637063 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/637063
Display apparatus with penetrating portion and method of manufacturing same Apr 15, 2024 Issued
Array ( [id] => 20118367 [patent_doc_number] => 12368085 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Integration of semiconductor device assemblies with thermal dissipation mechanisms [patent_app_type] => utility [patent_app_number] => 18/635186 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 39 [patent_no_of_words] => 2728 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635186 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/635186
Integration of semiconductor device assemblies with thermal dissipation mechanisms Apr 14, 2024 Issued
Array ( [id] => 19335572 [patent_doc_number] => 20240250002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/623992 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623992 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623992
Semiconductor device including through die via Mar 31, 2024 Issued
Array ( [id] => 19335572 [patent_doc_number] => 20240250002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/623992 [patent_app_country] => US [patent_app_date] => 2024-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 16726 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18623992 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/623992
Semiconductor device including through die via Mar 31, 2024 Issued
Array ( [id] => 20347572 [patent_doc_number] => 12471310 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-11 [patent_title] => Method of making a FinFET device including a step of removing a portion of a fin [patent_app_type] => utility [patent_app_number] => 18/581104 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18581104 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/581104
Method of making a FinFET device including a step of removing a portion of a fin Feb 18, 2024 Issued
Array ( [id] => 19237355 [patent_doc_number] => 20240194550 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-13 [patent_title] => ELECTRONIC DEVICES WITH A REDISTRIBUTION LAYER AND METHODS OF MANUFACTURING ELECTRONIC DEVICES WITH A REDISTRIBUTION LAYER [patent_app_type] => utility [patent_app_number] => 18/444951 [patent_app_country] => US [patent_app_date] => 2024-02-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10013 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => 0 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444951 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444951
ELECTRONIC DEVICES WITH A REDISTRIBUTION LAYER AND METHODS OF MANUFACTURING ELECTRONIC DEVICES WITH A REDISTRIBUTION LAYER Feb 18, 2024 Pending
Array ( [id] => 20389345 [patent_doc_number] => 12489080 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-02 [patent_title] => Flexible clip with aligner structure [patent_app_type] => utility [patent_app_number] => 18/444180 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 99 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444180 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/444180
Flexible clip with aligner structure Feb 15, 2024 Issued
Array ( [id] => 19206158 [patent_doc_number] => 20240178057 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-30 [patent_title] => SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/437017 [patent_app_country] => US [patent_app_date] => 2024-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11064 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -3 [patent_words_short_claim] => 246 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18437017 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/437017
SEMICONDUCTOR DEVICE, MANUFACTURING METHOD THEREOF, SOLID-STATE IMAGING DEVICE, AND ELECTRONIC APPARATUS Feb 7, 2024 Abandoned
Array ( [id] => 19191483 [patent_doc_number] => 20240170396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => PACKAGE STRUCTURE WITH INTERPOSER ENCAPSULATED BY AN ENCAPSULANT [patent_app_type] => utility [patent_app_number] => 18/427796 [patent_app_country] => US [patent_app_date] => 2024-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8326 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 51 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18427796 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/427796
PACKAGE STRUCTURE WITH INTERPOSER ENCAPSULATED BY AN ENCAPSULANT Jan 29, 2024 Pending
Array ( [id] => 19193586 [patent_doc_number] => 20240172499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => DISPLAY DEVICE [patent_app_type] => utility [patent_app_number] => 18/424535 [patent_app_country] => US [patent_app_date] => 2024-01-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9749 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18424535 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/424535
Display device with overlap layer Jan 25, 2024 Issued
Array ( [id] => 19252747 [patent_doc_number] => 20240203744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR PACKAGES WITH DIE INCLUDING CAVITIES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/416760 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416760
Semiconductor packages with die including cavities and related methods Jan 17, 2024 Issued
Array ( [id] => 19252747 [patent_doc_number] => 20240203744 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => SEMICONDUCTOR PACKAGES WITH DIE INCLUDING CAVITIES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/416760 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 37386 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416760 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416760
Semiconductor packages with die including cavities and related methods Jan 17, 2024 Issued
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