
Ajay Arora
Examiner (ID: 12666, Phone: (571)272-8347 , Office: P/2892 )
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2892, 2811 |
| Total Applications | 1272 |
| Issued Applications | 1029 |
| Pending Applications | 83 |
| Abandoned Applications | 184 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 15873797
[patent_doc_number] => 20200144302
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/733809
[patent_app_country] => US
[patent_app_date] => 2020-01-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5484
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16733809
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/733809 | Display device with sloped pinhole | Jan 2, 2020 | Issued |
Array
(
[id] => 15906417
[patent_doc_number] => 20200152729
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-14
[patent_title] => INTEGRATED TRENCH CAPACITOR FORMED IN AN EPITAXIAL LAYER
[patent_app_type] => utility
[patent_app_number] => 16/732371
[patent_app_country] => US
[patent_app_date] => 2020-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3521
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16732371
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/732371 | Integrated trench capacitor formed in an epitaxial layer | Jan 1, 2020 | Issued |
Array
(
[id] => 16046809
[patent_doc_number] => 10685278
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2020-06-16
[patent_title] => Long short-term memory cells with saturating gating functions
[patent_app_type] => utility
[patent_app_number] => 16/730855
[patent_app_country] => US
[patent_app_date] => 2019-12-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 5233
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 222
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16730855
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/730855 | Long short-term memory cells with saturating gating functions | Dec 29, 2019 | Issued |
Array
(
[id] => 16936550
[patent_doc_number] => 20210202439
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => HIGH POWER MODULE
[patent_app_type] => utility
[patent_app_number] => 16/727139
[patent_app_country] => US
[patent_app_date] => 2019-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12146
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 149
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16727139
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/727139 | HIGH POWER MODULE | Dec 25, 2019 | Abandoned |
Array
(
[id] => 16218658
[patent_doc_number] => 10734481
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2020-08-04
[patent_title] => Semiconductor devices with graded dopant regions
[patent_app_type] => utility
[patent_app_number] => 16/717950
[patent_app_country] => US
[patent_app_date] => 2019-12-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 1994
[patent_no_of_claims] => 36
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 170
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16717950
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/717950 | Semiconductor devices with graded dopant regions | Dec 16, 2019 | Issued |
Array
(
[id] => 18054068
[patent_doc_number] => 11527462
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-12-13
[patent_title] => Circuit substrate with mixed pitch wiring
[patent_app_type] => utility
[patent_app_number] => 16/714174
[patent_app_country] => US
[patent_app_date] => 2019-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 19
[patent_no_of_words] => 5734
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 110
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16714174
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/714174 | Circuit substrate with mixed pitch wiring | Dec 12, 2019 | Issued |
Array
(
[id] => 16256750
[patent_doc_number] => 20200266125
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-08-20
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/710012
[patent_app_country] => US
[patent_app_date] => 2019-12-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5096
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 28
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16710012
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/710012 | SEMICONDUCTOR DEVICE | Dec 10, 2019 | Abandoned |
Array
(
[id] => 17360075
[patent_doc_number] => 20220020871
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-20
[patent_title] => STACKED BUFFER IN TRANSISTORS
[patent_app_type] => utility
[patent_app_number] => 17/309583
[patent_app_country] => US
[patent_app_date] => 2019-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4311
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17309583
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/309583 | Stacked buffer in transistors | Dec 4, 2019 | Issued |
Array
(
[id] => 15718305
[patent_doc_number] => 20200105920
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-04-02
[patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 16/701975
[patent_app_country] => US
[patent_app_date] => 2019-12-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11417
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 84
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16701975
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/701975 | Semiconductor device doped from a diffused layer | Dec 2, 2019 | Issued |
Array
(
[id] => 16021281
[patent_doc_number] => 20200185484
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-06-11
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/700815
[patent_app_country] => US
[patent_app_date] => 2019-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15668
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -23
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16700815
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/700815 | Display device with first and second initialization lines | Dec 1, 2019 | Issued |
Array
(
[id] => 17303327
[patent_doc_number] => 20210399166
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-23
[patent_title] => LIGHT-EMITTING DIODE AND PROCESS FOR PRODUCING A LIGHT-EMITTING DIODE
[patent_app_type] => utility
[patent_app_number] => 17/296110
[patent_app_country] => US
[patent_app_date] => 2019-11-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10047
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 133
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17296110
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/296110 | Light-emitting diode with electrodes on a single face and process of producing the same | Nov 19, 2019 | Issued |
Array
(
[id] => 15625581
[patent_doc_number] => 20200083195
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => HIGH-SPEED SEMICONDUCTOR MODULES
[patent_app_type] => utility
[patent_app_number] => 16/684569
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5458
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684569
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/684569 | High-speed semiconductor modules | Nov 13, 2019 | Issued |
Array
(
[id] => 15625479
[patent_doc_number] => 20200083144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => HEAT DISSIPATION ASSEMBLY AND ELECTRONIC DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/683287
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8914
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 106
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683287
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/683287 | Heat dissipation assembly and electronic device | Nov 13, 2019 | Issued |
Array
(
[id] => 15625657
[patent_doc_number] => 20200083233
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-03-12
[patent_title] => INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 16/683674
[patent_app_country] => US
[patent_app_date] => 2019-11-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18171
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16683674
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/683674 | Memory cell comprising a metal control gate with a work function for an enlarged operation window | Nov 13, 2019 | Issued |
Array
(
[id] => 17559161
[patent_doc_number] => 11315883
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-04-26
[patent_title] => Integrated circuit product customizations for identification code visibility
[patent_app_type] => utility
[patent_app_number] => 16/680978
[patent_app_country] => US
[patent_app_date] => 2019-11-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 11
[patent_no_of_words] => 3888
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 70
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16680978
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/680978 | Integrated circuit product customizations for identification code visibility | Nov 11, 2019 | Issued |
Array
(
[id] => 15873497
[patent_doc_number] => 20200144152
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-05-07
[patent_title] => METHOD OF MANUFACTURING A COOLING CIRCUIT
[patent_app_type] => utility
[patent_app_number] => 16/675339
[patent_app_country] => US
[patent_app_date] => 2019-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5531
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16675339
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/675339 | Method of manufacturing a cooling circuit on an integrated circuit chip using a sacrificial material | Nov 5, 2019 | Issued |
Array
(
[id] => 17339725
[patent_doc_number] => 20220006056
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-01-06
[patent_title] => DISPLAY PANEL AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 16/617514
[patent_app_country] => US
[patent_app_date] => 2019-11-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4283
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16617514
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/617514 | Display panel and display device with an optical modulation layer | Nov 5, 2019 | Issued |
Array
(
[id] => 15564725
[patent_doc_number] => 20200066774
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-02-27
[patent_title] => Semiconductor Switching Device Separated by Device Isolation
[patent_app_type] => utility
[patent_app_number] => 16/672723
[patent_app_country] => US
[patent_app_date] => 2019-11-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3501
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 99
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16672723
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/672723 | Semiconductor switching device separated by device isolation | Nov 3, 2019 | Issued |
Array
(
[id] => 16440378
[patent_doc_number] => 20200357705
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2020-11-12
[patent_title] => METHOD OF MANUFACTURING A FLIP CHIP PACKAGE AND AN APPARATUS FOR TESTING FLIP CHIPS
[patent_app_type] => utility
[patent_app_number] => 16/669050
[patent_app_country] => US
[patent_app_date] => 2019-10-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3566
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 62
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16669050
[rel_patent_id] =>[rel_patent_doc_number] =>) 16/669050 | Method of manufacturing a flip chip package and an apparatus for testing flip chips | Oct 29, 2019 | Issued |
Array
(
[id] => 17277899
[patent_doc_number] => 20210384097
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-12-09
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/286367
[patent_app_country] => US
[patent_app_date] => 2019-10-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16178
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17286367
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/286367 | Semiconductor device with a supporting member and bonded metal layers | Oct 22, 2019 | Issued |