Search

Ajay Arora

Examiner (ID: 4150, Phone: (571)272-8347 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2892, 2811
Total Applications
1236
Issued Applications
1005
Pending Applications
90
Abandoned Applications
181

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19252830 [patent_doc_number] => 20240203827 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => THERMAL MANAGEMENT OF GPU-HBM PACKAGE BY MICROCHANNEL INTEGRATED SUBSTRATE [patent_app_type] => utility [patent_app_number] => 18/416579 [patent_app_country] => US [patent_app_date] => 2024-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/416579
THERMAL MANAGEMENT OF GPU-HBM PACKAGE BY MICROCHANNEL INTEGRATED SUBSTRATE Jan 17, 2024 Pending
Array ( [id] => 20132281 [patent_doc_number] => 12374599 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-29 [patent_title] => Package structure comprising a semiconductor die with thermoelectric elements and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 18/415587 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6276 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415587 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/415587
Package structure comprising a semiconductor die with thermoelectric elements and manufacturing method thereof Jan 16, 2024 Issued
Array ( [id] => 19918578 [patent_doc_number] => 12293954 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Method of fabricating semiconductor structure with heating element [patent_app_type] => utility [patent_app_number] => 18/409808 [patent_app_country] => US [patent_app_date] => 2024-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 17 [patent_no_of_words] => 1073 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409808 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409808
Method of fabricating semiconductor structure with heating element Jan 10, 2024 Issued
Array ( [id] => 19906579 [patent_doc_number] => 12283598 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-04-22 [patent_title] => Display device with metal layer having a slope [patent_app_type] => utility [patent_app_number] => 18/409337 [patent_app_country] => US [patent_app_date] => 2024-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18409337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/409337
Display device with metal layer having a slope Jan 9, 2024 Issued
Array ( [id] => 19858248 [patent_doc_number] => 12261099 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-25 [patent_title] => Embedded cooling systems with coolant channel for device packaging [patent_app_type] => utility [patent_app_number] => 18/394985 [patent_app_country] => US [patent_app_date] => 2023-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 19 [patent_no_of_words] => 9141 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18394985 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/394985
Embedded cooling systems with coolant channel for device packaging Dec 21, 2023 Issued
Array ( [id] => 19918647 [patent_doc_number] => 12294026 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => High electron mobility transistor with improved barrier layer [patent_app_type] => utility [patent_app_number] => 18/542781 [patent_app_country] => US [patent_app_date] => 2023-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 10 [patent_no_of_words] => 0 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542781 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/542781
High electron mobility transistor with improved barrier layer Dec 17, 2023 Issued
Array ( [id] => 19023172 [patent_doc_number] => 20240079343 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => SUPPORTS FOR THINNED SEMICONDUCTOR SUBSTRATES AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/507176 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3681 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18507176 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/507176
Supports for thinned semiconductor substrates and related methods Nov 12, 2023 Issued
Array ( [id] => 18882934 [patent_doc_number] => 20240006303 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => SEMICONDUCTOR DEVICE COMPRISING A CAPACITOR [patent_app_type] => utility [patent_app_number] => 18/469840 [patent_app_country] => US [patent_app_date] => 2023-09-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 115 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18469840 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/469840
Semiconductor device comprising a capacitor Sep 18, 2023 Issued
Array ( [id] => 19055068 [patent_doc_number] => 20240097037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/458489 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458489
TRANSISTOR DEVICE Aug 29, 2023 Pending
Array ( [id] => 19823383 [patent_doc_number] => 20250081590 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => SEMICONDUCTOR DEVICE WITH RECESSED GATE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/239874 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11954 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18239874 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/239874
SEMICONDUCTOR DEVICE WITH RECESSED GATE AND METHOD FOR FABRICATING THE SAME Aug 29, 2023 Pending
Array ( [id] => 19055068 [patent_doc_number] => 20240097037 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/458489 [patent_app_country] => US [patent_app_date] => 2023-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7994 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 158 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18458489 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/458489
TRANSISTOR DEVICE Aug 29, 2023 Pending
Array ( [id] => 18833836 [patent_doc_number] => 20230402363 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => POWER SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/457816 [patent_app_country] => US [patent_app_date] => 2023-08-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5424 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 219 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18457816 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/457816
POWER SEMICONDUCTOR DEVICE Aug 28, 2023 Pending
Array ( [id] => 19788511 [patent_doc_number] => 20250062190 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-20 [patent_title] => STACKED FET WITH BOTTOM EPI SIZE CONTROL AND WRAPAROUND BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 18/451952 [patent_app_country] => US [patent_app_date] => 2023-08-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7592 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18451952 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/451952
STACKED FET WITH BOTTOM EPI SIZE CONTROL AND WRAPAROUND BACKSIDE CONTACT Aug 17, 2023 Pending
Array ( [id] => 19773394 [patent_doc_number] => 20250054820 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-13 [patent_title] => Component Carrier With Mounting Region for Mounting a Component [patent_app_type] => utility [patent_app_number] => 18/366749 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10229 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 55 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366749 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366749
Component Carrier With Mounting Region for Mounting a Component Aug 7, 2023 Pending
Array ( [id] => 18958971 [patent_doc_number] => 20240047298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-08 [patent_title] => SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/231408 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 23674 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18231408 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/231408
SEMICONDUCTOR STRUCTURE Aug 7, 2023 Pending
Array ( [id] => 18812731 [patent_doc_number] => 20230387068 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-30 [patent_title] => Method Of Manufacturing A Package Using A Clip Having At Least One Locking Recess [patent_app_type] => utility [patent_app_number] => 18/366843 [patent_app_country] => US [patent_app_date] => 2023-08-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8818 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 73 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18366843 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/366843
Method of manufacturing a package using a clip having at least one locking recess Aug 7, 2023 Issued
Array ( [id] => 19539424 [patent_doc_number] => 12131981 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-29 [patent_title] => Power module package baseplate with step recess design [patent_app_type] => utility [patent_app_number] => 18/357931 [patent_app_country] => US [patent_app_date] => 2023-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 4908 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18357931 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/357931
Power module package baseplate with step recess design Jul 23, 2023 Issued
Array ( [id] => 19918575 [patent_doc_number] => 12293951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-06 [patent_title] => Semiconductor package structure having ring portion with recess for adhesive [patent_app_type] => utility [patent_app_number] => 18/351713 [patent_app_country] => US [patent_app_date] => 2023-07-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 2188 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18351713 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/351713
Semiconductor package structure having ring portion with recess for adhesive Jul 12, 2023 Issued
Array ( [id] => 18743581 [patent_doc_number] => 20230352569 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-02 [patent_title] => FIN FIELD EFFECT TRANSISTOR DEVICE STRUCTURE [patent_app_type] => utility [patent_app_number] => 18/345384 [patent_app_country] => US [patent_app_date] => 2023-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9684 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18345384 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/345384
Fin field effect transistor device structure Jun 29, 2023 Issued
Array ( [id] => 19509448 [patent_doc_number] => 12120890 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-10-15 [patent_title] => Tunnel magnetoresistive effect element, magnetic memory, and built-in memory [patent_app_type] => utility [patent_app_number] => 18/344150 [patent_app_country] => US [patent_app_date] => 2023-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10100 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18344150 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/344150
Tunnel magnetoresistive effect element, magnetic memory, and built-in memory Jun 28, 2023 Issued
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