Search

Ajay Arora

Examiner (ID: 12666, Phone: (571)272-8347 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2892, 2811
Total Applications
1272
Issued Applications
1029
Pending Applications
83
Abandoned Applications
184

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 9565999 [patent_doc_number] => 20140183712 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'BALL GRID ARRAY PACKAGE WITH IMPROVED THERMAL CHARACTERISTICS' [patent_app_type] => utility [patent_app_number] => 14/108430 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3634 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108430 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108430
Ball grid array package with improved thermal characteristics Dec 16, 2013 Issued
Array ( [id] => 9831794 [patent_doc_number] => 08940607 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-01-27 [patent_title] => 'Manufacturing method of trench type power transistor device with super junction' [patent_app_type] => utility [patent_app_number] => 14/108258 [patent_app_country] => US [patent_app_date] => 2013-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 15 [patent_no_of_words] => 5201 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14108258 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/108258
Manufacturing method of trench type power transistor device with super junction Dec 15, 2013 Issued
Array ( [id] => 9542432 [patent_doc_number] => 20140167079 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'ARRAY SUBSTRATE, METHOD FOR FABRICATING THE SAME AND DISPLAY DEVICE' [patent_app_type] => utility [patent_app_number] => 14/097778 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2994 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097778 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097778
Array substrate, method for fabricating the same and display device Dec 4, 2013 Issued
Array ( [id] => 9542406 [patent_doc_number] => 20140167053 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 14/097927 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 7083 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097927 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097927
Display device and manufacturing method thereof Dec 4, 2013 Issued
Array ( [id] => 10277437 [patent_doc_number] => 20150162434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-11 [patent_title] => 'METHOD FOR THE FORMATION OF A FINFET DEVICE HAVING PARTIALLY DIELECTRIC ISOLATED FIN STRUCTURE' [patent_app_type] => utility [patent_app_number] => 14/097570 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 4151 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097570
Method for the formation of a FinFET device having partially dielectric isolated Fin structure Dec 4, 2013 Issued
Array ( [id] => 9534361 [patent_doc_number] => 20140159008 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-12 [patent_title] => 'DOUBLE GATE TYPE THIN FILM TRANSISTOR AND ORGANIC LIGHT EMITTING DIODE DISPLAY INCLUDING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/097743 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2937 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097743 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097743
Double gate type thin film transistor and organic light emitting diode display including the same Dec 4, 2013 Issued
Array ( [id] => 9716670 [patent_doc_number] => 20140252368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-09-11 [patent_title] => 'HIGH-ELECTRON-MOBILITY TRANSISTOR' [patent_app_type] => utility [patent_app_number] => 14/097709 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 6317 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097709 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097709
High-electron-mobility transistor Dec 4, 2013 Issued
Array ( [id] => 9565854 [patent_doc_number] => 20140183567 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-03 [patent_title] => 'DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 14/097592 [patent_app_country] => US [patent_app_date] => 2013-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3111 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14097592 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/097592
Display device and method of manufacturing the same Dec 4, 2013 Issued
Array ( [id] => 9876054 [patent_doc_number] => 08963328 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-02-24 [patent_title] => 'Reducing delamination between an underfill and a buffer layer in a bond structure' [patent_app_type] => utility [patent_app_number] => 14/094503 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 14 [patent_no_of_words] => 2411 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094503 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094503
Reducing delamination between an underfill and a buffer layer in a bond structure Dec 1, 2013 Issued
Array ( [id] => 9384073 [patent_doc_number] => 20140087555 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-27 [patent_title] => 'METHOD OF FORMING SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/091680 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8576 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14091680 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/091680
Method of forming semiconductor device Nov 26, 2013 Issued
Array ( [id] => 11265884 [patent_doc_number] => 09490186 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-08 [patent_title] => 'Limiting adjustment of polishing rates during substrate polishing' [patent_app_type] => utility [patent_app_number] => 14/092429 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 9 [patent_no_of_words] => 11872 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 309 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14092429 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/092429
Limiting adjustment of polishing rates during substrate polishing Nov 26, 2013 Issued
Array ( [id] => 9368567 [patent_doc_number] => 20140078440 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-20 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 14/085958 [patent_app_country] => US [patent_app_date] => 2013-11-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 29545 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14085958 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/085958
Semiconductor device Nov 20, 2013 Issued
Array ( [id] => 9335113 [patent_doc_number] => 20140061895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-03-06 [patent_title] => 'Multi-Chip Module and Method of Manufacture' [patent_app_type] => utility [patent_app_number] => 14/076706 [patent_app_country] => US [patent_app_date] => 2013-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3777 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14076706 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/076706
Multi-Chip Module and Method of Manufacture Nov 10, 2013 Abandoned
Array ( [id] => 9995739 [patent_doc_number] => 09040333 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-05-26 [patent_title] => 'Method for fabricating power-generating module with solar cell' [patent_app_type] => utility [patent_app_number] => 14/075472 [patent_app_country] => US [patent_app_date] => 2013-11-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 3203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14075472 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/075472
Method for fabricating power-generating module with solar cell Nov 7, 2013 Issued
Array ( [id] => 10233805 [patent_doc_number] => 20150118799 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-30 [patent_title] => 'MECHANISM TO ATTACH A DIE TO A SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 14/066989 [patent_app_country] => US [patent_app_date] => 2013-10-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2947 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14066989 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/066989
Mechanism to attach a die to a substrate Oct 29, 2013 Issued
Array ( [id] => 10958231 [patent_doc_number] => 20140361256 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-12-11 [patent_title] => 'ORGANIC LIGHT EMITTING DEVICE INCLUDING AN AUXILIARY ELECTRODE' [patent_app_type] => utility [patent_app_number] => 14/046004 [patent_app_country] => US [patent_app_date] => 2013-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6203 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14046004 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/046004
Organic light emitting device including an auxiliary electrode Oct 3, 2013 Issued
Array ( [id] => 9810976 [patent_doc_number] => 20150022921 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-01-22 [patent_title] => 'SEMICONDUCTOR STRUCTURE FOR ENHANCED ESD PROTECTION' [patent_app_type] => utility [patent_app_number] => 14/045447 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 8691 [patent_no_of_claims] => 33 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045447 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045447
Semiconductor structure for enhanced ESD protection Oct 2, 2013 Issued
Array ( [id] => 10551257 [patent_doc_number] => 09275889 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-01 [patent_title] => 'Method and apparatus for high yield contact integration scheme' [patent_app_type] => utility [patent_app_number] => 14/045340 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 2630 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045340 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045340
Method and apparatus for high yield contact integration scheme Oct 2, 2013 Issued
Array ( [id] => 10544669 [patent_doc_number] => 09269806 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-23 [patent_title] => 'Semiconductor device and method of fabricating same' [patent_app_type] => utility [patent_app_number] => 14/045612 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 9 [patent_no_of_words] => 3386 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045612 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045612
Semiconductor device and method of fabricating same Oct 2, 2013 Issued
Array ( [id] => 11795255 [patent_doc_number] => 09405065 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-02 [patent_title] => 'Hybrid photonic and electronic integrated circuits' [patent_app_type] => utility [patent_app_number] => 14/045640 [patent_app_country] => US [patent_app_date] => 2013-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 11 [patent_no_of_words] => 5071 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 105 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14045640 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/045640
Hybrid photonic and electronic integrated circuits Oct 2, 2013 Issued
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