Search

Ajay Arora

Examiner (ID: 12666, Phone: (571)272-8347 , Office: P/2892 )

Most Active Art Unit
2892
Art Unit(s)
2892, 2811
Total Applications
1272
Issued Applications
1029
Pending Applications
83
Abandoned Applications
184

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8205266 [patent_doc_number] => 20120126396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'DIE DOWN DEVICE WITH THERMAL CONNECTOR' [patent_app_type] => utility [patent_app_number] => 12/950411 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 6135 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0126/20120126396.pdf [firstpage_image] =>[orig_patent_app_number] => 12950411 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/950411
DIE DOWN DEVICE WITH THERMAL CONNECTOR Nov 18, 2010 Abandoned
Array ( [id] => 6177682 [patent_doc_number] => 20110121402 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND PRODUCTION METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/950178 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 6676 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0121/20110121402.pdf [firstpage_image] =>[orig_patent_app_number] => 12950178 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/950178
BiCMOS device Nov 18, 2010 Issued
Array ( [id] => 6161144 [patent_doc_number] => 20110193102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-11 [patent_title] => 'ORGANIC LIGHT EMITTING DIODE DEVICE AND METHOD FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/950100 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4222 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0193/20110193102.pdf [firstpage_image] =>[orig_patent_app_number] => 12950100 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/950100
Organic light emitting diode device and method for manufacturing the same Nov 18, 2010 Issued
Array ( [id] => 5996997 [patent_doc_number] => 20110115093 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-05-19 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/950347 [patent_app_country] => US [patent_app_date] => 2010-11-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 8539 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0115/20110115093.pdf [firstpage_image] =>[orig_patent_app_number] => 12950347 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/950347
Semiconductor device with dummy contacts Nov 18, 2010 Issued
Array ( [id] => 5953325 [patent_doc_number] => 20110034027 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-02-10 [patent_title] => 'Structure and Process for the Formation of TSVs' [patent_app_type] => utility [patent_app_number] => 12/910621 [patent_app_country] => US [patent_app_date] => 2010-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 3788 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0034/20110034027.pdf [firstpage_image] =>[orig_patent_app_number] => 12910621 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/910621
Structure and process for the formation of TSVs Oct 21, 2010 Issued
Array ( [id] => 10864440 [patent_doc_number] => 08890143 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-11-18 [patent_title] => 'Method to optimize and reduce integrated circuit, package design, and verification cycle time' [patent_app_type] => utility [patent_app_number] => 12/887556 [patent_app_country] => US [patent_app_date] => 2010-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 3487 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 195 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12887556 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887556
Method to optimize and reduce integrated circuit, package design, and verification cycle time Sep 21, 2010 Issued
Array ( [id] => 6114227 [patent_doc_number] => 20110073867 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'ARRAY SUBSTRATE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/887698 [patent_app_country] => US [patent_app_date] => 2010-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4343 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20110073867.pdf [firstpage_image] =>[orig_patent_app_number] => 12887698 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887698
Array substrate and manufacturing method thereof Sep 21, 2010 Issued
Array ( [id] => 5972543 [patent_doc_number] => 20110068334 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 12/887606 [patent_app_country] => US [patent_app_date] => 2010-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 24 [patent_no_of_words] => 29549 [patent_no_of_claims] => 35 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20110068334.pdf [firstpage_image] =>[orig_patent_app_number] => 12887606 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887606
Device with oxide semiconductor thin film transistor Sep 21, 2010 Issued
Array ( [id] => 8533850 [patent_doc_number] => 08310006 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-11-13 [patent_title] => 'Devices, structures, and methods using self-aligned resistive source extensions' [patent_app_type] => utility [patent_app_number] => 12/887303 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 22 [patent_no_of_words] => 6150 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12887303 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887303
Devices, structures, and methods using self-aligned resistive source extensions Sep 20, 2010 Issued
Array ( [id] => 6075315 [patent_doc_number] => 20110140238 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/887111 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 6530 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140238.pdf [firstpage_image] =>[orig_patent_app_number] => 12887111 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887111
SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF Sep 20, 2010 Abandoned
Array ( [id] => 7496795 [patent_doc_number] => 20110260235 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-10-27 [patent_title] => 'P-TYPE CONTROL GATE IN NON-VOLATILE STORAGE AND METHODS FOR FORMING SAME' [patent_app_type] => utility [patent_app_number] => 12/887328 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 11035 [patent_no_of_claims] => 31 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0260/20110260235.pdf [firstpage_image] =>[orig_patent_app_number] => 12887328 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887328
P-type control gate in non-volatile storage and methods for forming same Sep 20, 2010 Issued
Array ( [id] => 6074973 [patent_doc_number] => 20110140097 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'THIN FILM TRANSISTOR AND METHOD OF FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 12/887282 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3798 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0140/20110140097.pdf [firstpage_image] =>[orig_patent_app_number] => 12887282 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887282
Thin film transistor and method of fabricating the same Sep 20, 2010 Issued
Array ( [id] => 5972553 [patent_doc_number] => 20110068337 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-24 [patent_title] => 'Display and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 12/923434 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5325 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20110068337.pdf [firstpage_image] =>[orig_patent_app_number] => 12923434 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/923434
Display device with metal oxidel layer and method for manufacturing the same Sep 20, 2010 Issued
Array ( [id] => 11307823 [patent_doc_number] => 09515229 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-12-06 [patent_title] => 'Semiconductor light emitting devices with optical coatings and methods of making same' [patent_app_type] => utility [patent_app_number] => 12/887067 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 7349 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 184 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12887067 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887067
Semiconductor light emitting devices with optical coatings and methods of making same Sep 20, 2010 Issued
Array ( [id] => 6026805 [patent_doc_number] => 20110079793 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-07 [patent_title] => 'SEMICONDUCTOR SUBSTRATE AND ITS MANUFACTURING METHOD' [patent_app_type] => utility [patent_app_number] => 12/887005 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 5095 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0079/20110079793.pdf [firstpage_image] =>[orig_patent_app_number] => 12887005 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887005
Semiconductor substrate with cobalt silicide buffer layer and its manufacturing method Sep 20, 2010 Issued
Array ( [id] => 6114671 [patent_doc_number] => 20110074042 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 12/887093 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5121 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0074/20110074042.pdf [firstpage_image] =>[orig_patent_app_number] => 12887093 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887093
ELECTRONIC DEVICE Sep 20, 2010 Abandoned
Array ( [id] => 9020996 [patent_doc_number] => 08530982 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-09-10 [patent_title] => 'Micromechanical structure, method for manufacturing a micromechanical structure, and use of a micromechanical structure' [patent_app_type] => utility [patent_app_number] => 12/924160 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 1 [patent_figures_cnt] => 3 [patent_no_of_words] => 3052 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12924160 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/924160
Micromechanical structure, method for manufacturing a micromechanical structure, and use of a micromechanical structure Sep 20, 2010 Issued
Array ( [id] => 5980257 [patent_doc_number] => 20110095396 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-04-28 [patent_title] => 'METHOD AND STRUCTURE FOR SILICON NANOCRYSTAL CAPACITOR DEVICES FOR INTEGRATED CIRCUITS' [patent_app_type] => utility [patent_app_number] => 12/887481 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3142 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0095/20110095396.pdf [firstpage_image] =>[orig_patent_app_number] => 12887481 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887481
METHOD AND STRUCTURE FOR SILICON NANOCRYSTAL CAPACITOR DEVICES FOR INTEGRATED CIRCUITS Sep 20, 2010 Abandoned
Array ( [id] => 8037207 [patent_doc_number] => 20120068339 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'VLSI Package for High Performance Integrated Circuit' [patent_app_type] => utility [patent_app_number] => 12/887298 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7312 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0068/20120068339.pdf [firstpage_image] =>[orig_patent_app_number] => 12887298 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887298
VLSI Package for High Performance Integrated Circuit Sep 20, 2010 Abandoned
Array ( [id] => 6114381 [patent_doc_number] => 20110073935 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-03-31 [patent_title] => 'NONVOLATILE SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/887114 [patent_app_country] => US [patent_app_date] => 2010-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 11310 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0073/20110073935.pdf [firstpage_image] =>[orig_patent_app_number] => 12887114 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/887114
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE Sep 20, 2010 Abandoned
Menu