
Ajay Arora
Examiner (ID: 14891, Phone: (571)272-8347 , Office: P/2892 )
| Most Active Art Unit | 2892 |
| Art Unit(s) | 2892, 2811 |
| Total Applications | 1253 |
| Issued Applications | 1018 |
| Pending Applications | 83 |
| Abandoned Applications | 182 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18195569
[patent_doc_number] => 20230049088
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-16
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICES, CORRESPONDING SEMICONDUCTOR DEVICE AND ASSORTMENT OF SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/881921
[patent_app_country] => US
[patent_app_date] => 2022-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3493
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 210
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881921
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/881921 | Semiconductor device and assortment of semiconductor devices with electrically conductive ribbon configurations | Aug 4, 2022 | Issued |
Array
(
[id] => 18169830
[patent_doc_number] => 20230036441
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-02
[patent_title] => PROTECTIVE SEMICONDUCTOR ELEMENTS FOR BONDED STRUCTURES
[patent_app_type] => utility
[patent_app_number] => 17/816346
[patent_app_country] => US
[patent_app_date] => 2022-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9654
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -25
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17816346
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/816346 | Protective semiconductor elements for bonded structures | Jul 28, 2022 | Issued |
Array
(
[id] => 17985940
[patent_doc_number] => 20220351977
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => DIE SIDEWALL COATINGS AND RELATED METHODS
[patent_app_type] => utility
[patent_app_number] => 17/813348
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 33147
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 68
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813348
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813348 | Die sidewall coatings and related methods | Jul 18, 2022 | Issued |
Array
(
[id] => 19539451
[patent_doc_number] => 12132008
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-29
[patent_title] => Multidie supports and related methods
[patent_app_type] => utility
[patent_app_number] => 17/813357
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 18
[patent_no_of_words] => 8317
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813357
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813357 | Multidie supports and related methods | Jul 18, 2022 | Issued |
Array
(
[id] => 17985941
[patent_doc_number] => 20220351978
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-03
[patent_title] => SEMICONDUCTOR PACKAGES WITH THIN DIE AND RELATED METHODS
[patent_app_type] => utility
[patent_app_number] => 17/813351
[patent_app_country] => US
[patent_app_date] => 2022-07-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 32048
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 96
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17813351
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/813351 | Semiconductor packages with die support structure for thin die | Jul 18, 2022 | Issued |
Array
(
[id] => 18162655
[patent_doc_number] => 20230029248
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-26
[patent_title] => CHIP MODULE AND METHOD FOR FORMING A CHIP MODULE
[patent_app_type] => utility
[patent_app_number] => 17/866788
[patent_app_country] => US
[patent_app_date] => 2022-07-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2693
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 71
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17866788
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/866788 | CHIP MODULE AND METHOD FOR FORMING A CHIP MODULE | Jul 17, 2022 | Abandoned |
Array
(
[id] => 18906058
[patent_doc_number] => 20240021543
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-18
[patent_title] => LASER-DETECTION DEVICES INCLUDING A VOLTAGE-CONTROLLED MAGNETIC-TUNNELING-JUNCTION LAYER STACK
[patent_app_type] => utility
[patent_app_number] => 17/862487
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2811
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 85
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862487
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/862487 | Laser-detection devices including a voltage-controlled magnetic-tunneling-junction layer stack | Jul 11, 2022 | Issued |
Array
(
[id] => 18122383
[patent_doc_number] => 20230007986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => TERMINAL MEMBER AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/857261
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857261 | Tip connection portion of terminal member and associated semiconductor device | Jul 4, 2022 | Issued |
Array
(
[id] => 18122383
[patent_doc_number] => 20230007986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => TERMINAL MEMBER AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/857261
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857261 | Tip connection portion of terminal member and associated semiconductor device | Jul 4, 2022 | Issued |
Array
(
[id] => 18122383
[patent_doc_number] => 20230007986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => TERMINAL MEMBER AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/857261
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857261 | Tip connection portion of terminal member and associated semiconductor device | Jul 4, 2022 | Issued |
Array
(
[id] => 18122383
[patent_doc_number] => 20230007986
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-12
[patent_title] => TERMINAL MEMBER AND SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/857261
[patent_app_country] => US
[patent_app_date] => 2022-07-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8631
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 54
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17857261
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/857261 | Tip connection portion of terminal member and associated semiconductor device | Jul 4, 2022 | Issued |
Array
(
[id] => 18882977
[patent_doc_number] => 20240006346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => METAL-INSULATOR-METAL CAPACITOR (MIMCAP)-BASED PHYSICALLY UNCLONABLE FUNCTION
[patent_app_type] => utility
[patent_app_number] => 17/854125
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9505
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 318
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854125
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/854125 | METAL-INSULATOR-METAL CAPACITOR (MIMCAP)-BASED PHYSICALLY UNCLONABLE FUNCTION | Jun 29, 2022 | Abandoned |
Array
(
[id] => 17949294
[patent_doc_number] => 20220336313
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-20
[patent_title] => SEMICONDUCTOR STRUCTURE WITH HEATING ELEMENT
[patent_app_type] => utility
[patent_app_number] => 17/853924
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6104
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853924
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853924 | Semiconductor structure with heating element | Jun 29, 2022 | Issued |
Array
(
[id] => 17933281
[patent_doc_number] => 20220328407
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-10-13
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/851313
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8293
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 161
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17851313
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/851313 | Terminal configuration and semiconductor device | Jun 27, 2022 | Issued |
Array
(
[id] => 19858250
[patent_doc_number] => 12261101
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-03-25
[patent_title] => Semiconductor package having wettable lead flanks and tie bars and method of making the same
[patent_app_type] => utility
[patent_app_number] => 17/852356
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 12
[patent_no_of_words] => 3418
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852356
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852356 | Semiconductor package having wettable lead flanks and tie bars and method of making the same | Jun 27, 2022 | Issued |
Array
(
[id] => 18679955
[patent_doc_number] => 20230317613
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-10-05
[patent_title] => SEMICONDUCTOR PACKAGE AND METHOD OF FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/848779
[patent_app_country] => US
[patent_app_date] => 2022-06-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4876
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17848779
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/848779 | Semiconductor package and method of forming the same with dielectric layer disposed between protective mold structure and stepped structure of side portion of semiconductor die | Jun 23, 2022 | Issued |
Array
(
[id] => 18008574
[patent_doc_number] => 20220367341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/842945
[patent_app_country] => US
[patent_app_date] => 2022-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5172
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17842945
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/842945 | Semiconductor structure with shielding structure for through silicon via and manufacturing method thereof | Jun 16, 2022 | Issued |
Array
(
[id] => 18068212
[patent_doc_number] => 20220399300
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-12-15
[patent_title] => CLIP STRUCTURE FOR SEMICONDUCTOR PACKAGE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/839479
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6200
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839479
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/839479 | Clip structure for semiconductor package and semiconductor package including the same | Jun 13, 2022 | Issued |
Array
(
[id] => 19444507
[patent_doc_number] => 12094797
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-17
[patent_title] => Pressing device for directly or indirectly applying pressure to power-semiconductor components of a power-semiconductor module
[patent_app_type] => utility
[patent_app_number] => 17/840405
[patent_app_country] => US
[patent_app_date] => 2022-06-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 4987
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17840405
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/840405 | Pressing device for directly or indirectly applying pressure to power-semiconductor components of a power-semiconductor module | Jun 13, 2022 | Issued |
Array
(
[id] => 18564731
[patent_doc_number] => 11730001
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-08-15
[patent_title] => Tunnel magnetoresistive effect element, magnetic memory, and built-in memory
[patent_app_type] => utility
[patent_app_number] => 17/835458
[patent_app_country] => US
[patent_app_date] => 2022-06-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 11
[patent_no_of_words] => 10085
[patent_no_of_claims] => 21
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 75
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17835458
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/835458 | Tunnel magnetoresistive effect element, magnetic memory, and built-in memory | Jun 7, 2022 | Issued |