Search

Akm E. Ullah

Examiner (ID: 4044, Phone: (571)272-2361 , Office: P/2874 )

Most Active Art Unit
2874
Art Unit(s)
2606, 2899, 2874, 2501, 1734, 2838, 3621
Total Applications
3400
Issued Applications
3065
Pending Applications
95
Abandoned Applications
245

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 7682604 [patent_doc_number] => 20100241807 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-09-23 [patent_title] => 'VIRTUALIZED DATA STORAGE SYSTEM CACHE MANAGEMENT' [patent_app_type] => utility [patent_app_number] => 12/730192 [patent_app_country] => US [patent_app_date] => 2010-03-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 14776 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0241/20100241807.pdf [firstpage_image] =>[orig_patent_app_number] => 12730192 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/730192
VIRTUALIZED DATA STORAGE SYSTEM CACHE MANAGEMENT Mar 22, 2010 Abandoned
Array ( [id] => 10131079 [patent_doc_number] => 09164914 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-10-20 [patent_title] => 'Multiple port routing circuitry for flash memory storage systems' [patent_app_type] => utility [patent_app_number] => 12/728757 [patent_app_country] => US [patent_app_date] => 2010-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 11 [patent_no_of_words] => 5433 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 231 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12728757 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/728757
Multiple port routing circuitry for flash memory storage systems Mar 21, 2010 Issued
Array ( [id] => 8799471 [patent_doc_number] => 08438358 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2013-05-07 [patent_title] => 'System-on-chip with memory speed control core' [patent_app_type] => utility [patent_app_number] => 12/729210 [patent_app_country] => US [patent_app_date] => 2010-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5274 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 230 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12729210 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/729210
System-on-chip with memory speed control core Mar 21, 2010 Issued
Array ( [id] => 5960727 [patent_doc_number] => 20110185114 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-07-28 [patent_title] => 'SYSTEM AND METHOD FOR READ-WHILE-WRITE WITH NAND MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 12/728472 [patent_app_country] => US [patent_app_date] => 2010-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5092 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0185/20110185114.pdf [firstpage_image] =>[orig_patent_app_number] => 12728472 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/728472
System and method for read-while-write with NAND memory device Mar 21, 2010 Issued
Array ( [id] => 11299694 [patent_doc_number] => 09507702 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-11-29 [patent_title] => 'Method of performing write access by distributing control rights to threads, memory controller and flash memory storage device using the same' [patent_app_type] => utility [patent_app_number] => 12/728446 [patent_app_country] => US [patent_app_date] => 2010-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 11 [patent_no_of_words] => 7476 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12728446 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/728446
Method of performing write access by distributing control rights to threads, memory controller and flash memory storage device using the same Mar 21, 2010 Issued
Array ( [id] => 9089340 [patent_doc_number] => 08560787 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-10-15 [patent_title] => 'Incremental backup of source to target storage volume' [patent_app_type] => utility [patent_app_number] => 12/729166 [patent_app_country] => US [patent_app_date] => 2010-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6810 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12729166 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/729166
Incremental backup of source to target storage volume Mar 21, 2010 Issued
Array ( [id] => 8432625 [patent_doc_number] => 20120254499 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-10-04 [patent_title] => 'PROGRAM, CONTROL METHOD, AND CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/510019 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 13758 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13510019 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/510019
PROGRAM, CONTROL METHOD, AND CONTROL DEVICE Mar 4, 2010 Abandoned
Array ( [id] => 8045861 [patent_doc_number] => 20120072658 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-03-22 [patent_title] => 'PROGRAM, CONTROL METHOD, AND CONTROL DEVICE' [patent_app_type] => utility [patent_app_number] => 13/375659 [patent_app_country] => US [patent_app_date] => 2010-03-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 10755 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0072/20120072658.pdf [firstpage_image] =>[orig_patent_app_number] => 13375659 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/375659
PROGRAM, CONTROL METHOD, AND CONTROL DEVICE Mar 4, 2010 Abandoned
Array ( [id] => 6117044 [patent_doc_number] => 20110191562 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-08-04 [patent_title] => 'Apparatus and method for partitioning, sandboxing and protecting external memories' [patent_app_type] => utility [patent_app_number] => 12/714367 [patent_app_country] => US [patent_app_date] => 2010-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5288 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0191/20110191562.pdf [firstpage_image] =>[orig_patent_app_number] => 12714367 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/714367
Apparatus and method for partitioning, sandboxing and protecting external memories Feb 25, 2010 Abandoned
Array ( [id] => 9592760 [patent_doc_number] => 08782325 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2014-07-15 [patent_title] => 'Data type based alignment of data written to non-volatile memory' [patent_app_type] => utility [patent_app_number] => 12/700561 [patent_app_country] => US [patent_app_date] => 2010-02-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 6 [patent_no_of_words] => 4104 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12700561 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/700561
Data type based alignment of data written to non-volatile memory Feb 3, 2010 Issued
Array ( [id] => 5976360 [patent_doc_number] => 20110153948 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-23 [patent_title] => 'SYSTEMS, METHODS, AND APPARATUS FOR MONITORING SYNCHRONIZATION IN A DISTRIBUTED CACHE' [patent_app_type] => utility [patent_app_number] => 12/644506 [patent_app_country] => US [patent_app_date] => 2009-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4852 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0153/20110153948.pdf [firstpage_image] =>[orig_patent_app_number] => 12644506 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/644506
Monitoring thread synchronization in a distributed cache Dec 21, 2009 Issued
Array ( [id] => 6087982 [patent_doc_number] => 20110145546 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-16 [patent_title] => 'DEFERRED PAGE CLEARING IN A MULTIPROCESSOR COMPUTER SYSTEM' [patent_app_type] => utility [patent_app_number] => 12/636819 [patent_app_country] => US [patent_app_date] => 2009-12-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 32 [patent_figures_cnt] => 32 [patent_no_of_words] => 22928 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0145/20110145546.pdf [firstpage_image] =>[orig_patent_app_number] => 12636819 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/636819
Deferred page clearing in a multiprocessor computer system Dec 13, 2009 Issued
Array ( [id] => 6147402 [patent_doc_number] => 20110131432 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2011-06-02 [patent_title] => 'System and Method for Reducing Power Consumption of Memory' [patent_app_type] => utility [patent_app_number] => 12/629681 [patent_app_country] => US [patent_app_date] => 2009-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 4993 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0131/20110131432.pdf [firstpage_image] =>[orig_patent_app_number] => 12629681 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/629681
System and method for reducing power consumption of memory Dec 1, 2009 Issued
Array ( [id] => 8325747 [patent_doc_number] => 20120198158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-08-02 [patent_title] => 'Multi-Channel Cache Memory' [patent_app_type] => utility [patent_app_number] => 13/496649 [patent_app_country] => US [patent_app_date] => 2009-09-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4821 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 20 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13496649 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/496649
Multi-channel cache memory Sep 16, 2009 Issued
Array ( [id] => 5467392 [patent_doc_number] => 20090327592 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'CLUSTERING DEVICE FOR FLASH MEMORY AND METHOD THEREOF' [patent_app_type] => utility [patent_app_number] => 12/493346 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4331 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327592.pdf [firstpage_image] =>[orig_patent_app_number] => 12493346 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493346
CLUSTERING DEVICE FOR FLASH MEMORY AND METHOD THEREOF Jun 28, 2009 Abandoned
Array ( [id] => 9430865 [patent_doc_number] => 08706951 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-04-22 [patent_title] => 'Selectively accessing faster or slower multi-level cell memory' [patent_app_type] => utility [patent_app_number] => 12/493349 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 7387 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12493349 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493349
Selectively accessing faster or slower multi-level cell memory Jun 28, 2009 Issued
Array ( [id] => 9680432 [patent_doc_number] => 08819359 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2014-08-26 [patent_title] => 'Hybrid interleaving in memory modules by interleaving physical addresses for a page across ranks in a memory module' [patent_app_type] => utility [patent_app_number] => 12/493455 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6663 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 12493455 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493455
Hybrid interleaving in memory modules by interleaving physical addresses for a page across ranks in a memory module Jun 28, 2009 Issued
Array ( [id] => 5467424 [patent_doc_number] => 20090327624 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2009-12-31 [patent_title] => 'INFORMATION PROCESSING APPARATUS, CONTROLLING METHOD THEREOF, AND PROGRAM' [patent_app_type] => utility [patent_app_number] => 12/493402 [patent_app_country] => US [patent_app_date] => 2009-06-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7969 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0327/20090327624.pdf [firstpage_image] =>[orig_patent_app_number] => 12493402 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493402
INFORMATION PROCESSING APPARATUS, CONTROLLING METHOD THEREOF, AND PROGRAM Jun 28, 2009 Abandoned
Array ( [id] => 6362547 [patent_doc_number] => 20100332771 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2010-12-30 [patent_title] => 'PRIVATE MEMORY REGIONS AND COHERENCE OPTIMIZATIONS' [patent_app_type] => utility [patent_app_number] => 12/493164 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 6967 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0332/20100332771.pdf [firstpage_image] =>[orig_patent_app_number] => 12493164 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493164
Private memory regions and coherence optimizations Jun 25, 2009 Issued
Array ( [id] => 8120057 [patent_doc_number] => 08161247 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2012-04-17 [patent_title] => 'Wait loss synchronization' [patent_app_type] => utility [patent_app_number] => 12/493163 [patent_app_country] => US [patent_app_date] => 2009-06-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 7726 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 240 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/08/161/08161247.pdf [firstpage_image] =>[orig_patent_app_number] => 12493163 [rel_patent_id] =>[rel_patent_doc_number] =>)
12/493163
Wait loss synchronization Jun 25, 2009 Issued
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