Search

Akm Zakaria

Examiner (ID: 10697, Phone: (571)270-0664 , Office: P/2868 )

Most Active Art Unit
2868
Art Unit(s)
2868, 2858
Total Applications
868
Issued Applications
650
Pending Applications
101
Abandoned Applications
136

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 11108070 [patent_doc_number] => 20160305040 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-20 [patent_title] => 'Method of Manufacturing a Silicon Wafer' [patent_app_type] => utility [patent_app_number] => 15/189067 [patent_app_country] => US [patent_app_date] => 2016-06-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 7840 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15189067 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/189067
Method of manufacturing a silicon wafer Jun 21, 2016 Issued
Array ( [id] => 13695473 [patent_doc_number] => 20170358691 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-14 [patent_title] => Reconfigurable MOS Varactor [patent_app_type] => utility [patent_app_number] => 15/181834 [patent_app_country] => US [patent_app_date] => 2016-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3350 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15181834 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/181834
Reconfigurable MOS Varactor Jun 13, 2016 Abandoned
Array ( [id] => 16878337 [patent_doc_number] => 11028473 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-06-08 [patent_title] => Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium [patent_app_type] => utility [patent_app_number] => 15/175389 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 14 [patent_no_of_words] => 17476 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 182 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175389 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175389
Method of manufacturing semiconductor device, substrate processing apparatus, and recording medium Jun 6, 2016 Issued
Array ( [id] => 16817115 [patent_doc_number] => 11001923 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-05-11 [patent_title] => Method of manufacturing semiconductor device and recording medium [patent_app_type] => utility [patent_app_number] => 15/175533 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 19781 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 308 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175533 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175533
Method of manufacturing semiconductor device and recording medium Jun 6, 2016 Issued
Array ( [id] => 13229315 [patent_doc_number] => 10128440 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-13 [patent_title] => Deposition mask assembly and method of manufacturing display device using the same [patent_app_type] => utility [patent_app_number] => 15/175282 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 13 [patent_no_of_words] => 7686 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175282 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175282
Deposition mask assembly and method of manufacturing display device using the same Jun 6, 2016 Issued
Array ( [id] => 14397693 [patent_doc_number] => 10312137 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-06-04 [patent_title] => Hardmask layer for 3D NAND staircase structure in semiconductor applications [patent_app_type] => utility [patent_app_number] => 15/175880 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 8 [patent_no_of_words] => 7255 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 160 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175880 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175880
Hardmask layer for 3D NAND staircase structure in semiconductor applications Jun 6, 2016 Issued
Array ( [id] => 11557906 [patent_doc_number] => 20170104152 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-13 [patent_title] => 'Method of Inspecting By-Products and Method of Manufacturing Semiconductor Device Using the Same' [patent_app_type] => utility [patent_app_number] => 15/175463 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 4520 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175463 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175463
Method of inspecting by-products and method of manufacturing semiconductor device using the same Jun 6, 2016 Issued
Array ( [id] => 12095489 [patent_doc_number] => 20170352582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-12-07 [patent_title] => 'PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A BOND PAD' [patent_app_type] => utility [patent_app_number] => 15/175191 [patent_app_country] => US [patent_app_date] => 2016-06-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 6835 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15175191 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/175191
PROCESS OF FORMING AN ELECTRONIC DEVICE INCLUDING A BOND PAD Jun 6, 2016 Abandoned
Array ( [id] => 11079325 [patent_doc_number] => 20160276290 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-22 [patent_title] => 'SEMICONDUCTOR PACKAGE AND MOBILE DEVICE USING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/169246 [patent_app_country] => US [patent_app_date] => 2016-05-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 6645 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15169246 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/169246
Semiconductor package and mobile device using the same May 30, 2016 Issued
Array ( [id] => 11718232 [patent_doc_number] => 20170186731 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-29 [patent_title] => 'SOLID STATE DRIVE OPTIMIZED FOR WAFERS' [patent_app_type] => utility [patent_app_number] => 15/166038 [patent_app_country] => US [patent_app_date] => 2016-05-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 18 [patent_no_of_words] => 9205 [patent_no_of_claims] => 28 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15166038 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/166038
SOLID STATE DRIVE OPTIMIZED FOR WAFERS May 25, 2016 Abandoned
Array ( [id] => 12813700 [patent_doc_number] => 20180163070 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-06-14 [patent_title] => SOLUTION PROCESS FOR INSB NANOPARTICLES AND APPLICATION FOR IR DETECTORS [patent_app_type] => utility [patent_app_number] => 15/578063 [patent_app_country] => US [patent_app_date] => 2016-05-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3045 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 11 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15578063 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/578063
SOLUTION PROCESS FOR INSB NANOPARTICLES AND APPLICATION FOR IR DETECTORS May 5, 2016 Abandoned
Array ( [id] => 11904453 [patent_doc_number] => 09773895 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-09-26 [patent_title] => 'Half-bridge HEMT circuit and an electronic package including the circuit' [patent_app_type] => utility [patent_app_number] => 15/133644 [patent_app_country] => US [patent_app_date] => 2016-04-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 9284 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 127 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15133644 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/133644
Half-bridge HEMT circuit and an electronic package including the circuit Apr 19, 2016 Issued
Array ( [id] => 11103883 [patent_doc_number] => 20160300853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-10-13 [patent_title] => 'DISPLAY DEVICE AND ELECTRONIC DEVICE' [patent_app_type] => utility [patent_app_number] => 15/088193 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 41 [patent_figures_cnt] => 41 [patent_no_of_words] => 39811 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088193 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088193
Display device and electronic device Mar 31, 2016 Issued
Array ( [id] => 11983825 [patent_doc_number] => 20170287980 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-10-05 [patent_title] => 'THERMAL INSULATION FOR THREE-DIMENSIONAL MEMORY ARRAYS' [patent_app_type] => utility [patent_app_number] => 15/088475 [patent_app_country] => US [patent_app_date] => 2016-04-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 11727 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15088475 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/088475
Thermal insulation for three-dimensional memory arrays Mar 31, 2016 Issued
Array ( [id] => 17254075 [patent_doc_number] => 11189573 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-11-30 [patent_title] => Semiconductor package with electromagnetic interference shielding using metal layers and vias [patent_app_type] => utility [patent_app_number] => 16/069377 [patent_app_country] => US [patent_app_date] => 2016-03-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 16 [patent_no_of_words] => 6240 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 197 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16069377 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/069377
Semiconductor package with electromagnetic interference shielding using metal layers and vias Mar 30, 2016 Issued
Array ( [id] => 14024749 [patent_doc_number] => 20190074368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-07 [patent_title] => GALLIUM NITRIDE TRANSISTORS FOR HIGH-VOLTAGE RADIO FREQUENCY SWITCHES [patent_app_type] => utility [patent_app_number] => 16/084203 [patent_app_country] => US [patent_app_date] => 2016-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -22 [patent_words_short_claim] => 69 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16084203 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/084203
Gallium nitride transistors for high-voltage radio frequency switches Mar 27, 2016 Issued
Array ( [id] => 12189186 [patent_doc_number] => 20180048122 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2018-02-15 [patent_title] => 'METHOD OF PRODUCING AN ELECTRONIC COMPONENT' [patent_app_type] => utility [patent_app_number] => 15/550888 [patent_app_country] => US [patent_app_date] => 2016-02-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 17 [patent_no_of_words] => 8669 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15550888 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/550888
Method of producing an electronic component Feb 17, 2016 Issued
Array ( [id] => 11867657 [patent_doc_number] => 20170234942 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-17 [patent_title] => 'LAYOUTS FOR INTERLEVEL CRACK PREVENTION IN FLUXGATE TECHNOLOGY MANUFACTURING' [patent_app_type] => utility [patent_app_number] => 15/042119 [patent_app_country] => US [patent_app_date] => 2016-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 4772 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15042119 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/042119
LAYOUTS FOR INTERLEVEL CRACK PREVENTION IN FLUXGATE TECHNOLOGY MANUFACTURING Feb 10, 2016 Abandoned
Array ( [id] => 11862124 [patent_doc_number] => 09741817 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-08-22 [patent_title] => 'Method for manufacturing a trench metal insulator metal capacitor' [patent_app_type] => utility [patent_app_number] => 15/002420 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 4722 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 238 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002420 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/002420
Method for manufacturing a trench metal insulator metal capacitor Jan 20, 2016 Issued
Array ( [id] => 11824803 [patent_doc_number] => 20170213740 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-07-27 [patent_title] => 'METHOD FOR FABRICATING SEMICONDUCTOR PACKAGE' [patent_app_type] => utility [patent_app_number] => 15/002405 [patent_app_country] => US [patent_app_date] => 2016-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4030 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15002405 [rel_patent_id] =>[rel_patent_doc_number] =>)
15/002405
Method for fabricating semiconductor package Jan 20, 2016 Issued
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