Search

Alan L. Rotman

Examiner (ID: 4314)

Most Active Art Unit
1201
Art Unit(s)
1201, 1203, 1802, 1625, 2899, 1612
Total Applications
2275
Issued Applications
1794
Pending Applications
68
Abandoned Applications
413

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 8301515 [patent_doc_number] => 20120184073 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'PROGRAMMABLE HIGH-K/METAL GATE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/433423 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6484 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13433423 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/433423
Programmable high-k/metal gate memory device Mar 28, 2012 Issued
Array ( [id] => 8301536 [patent_doc_number] => 20120184090 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-19 [patent_title] => 'METHOD OF FABRICATING SINGLE CRYSTAL GALLIUM NITRIDE SEMICONDUCTOR SUBSTRATE, NITRIDE GALLIUM SEMICONDUCTOR SUBSTRATE AND NITRIDE SEMICONDUCTOR EPITAXIAL SUBSTRATE' [patent_app_type] => utility [patent_app_number] => 13/434437 [patent_app_country] => US [patent_app_date] => 2012-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7334 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13434437 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/434437
Gallium nitride semiconductor substrate with semiconductor film formed therein Mar 28, 2012 Issued
Array ( [id] => 8310256 [patent_doc_number] => 20120187279 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'METHOD OF SENSING OF LOW-VOLTAGE IMAGE SENSOR' [patent_app_type] => utility [patent_app_number] => 13/432991 [patent_app_country] => US [patent_app_date] => 2012-03-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 8789 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13432991 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/432991
METHOD OF SENSING OF LOW-VOLTAGE IMAGE SENSOR Mar 27, 2012 Abandoned
Array ( [id] => 10086456 [patent_doc_number] => 09123811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-09-01 [patent_title] => 'Semiconductor device having a triple gate transistor and method for manufacturing the same' [patent_app_type] => utility [patent_app_number] => 13/417706 [patent_app_country] => US [patent_app_date] => 2012-03-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 24 [patent_no_of_words] => 6496 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13417706 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/417706
Semiconductor device having a triple gate transistor and method for manufacturing the same Mar 11, 2012 Issued
Array ( [id] => 8207522 [patent_doc_number] => 20120127685 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-05-24 [patent_title] => 'STACKED PACKAGED INTEGRATED CIRCUIT DEVICES, AND METHODS OF MAKING SAME' [patent_app_type] => utility [patent_app_number] => 13/361073 [patent_app_country] => US [patent_app_date] => 2012-01-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 1957 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0127/20120127685.pdf [firstpage_image] =>[orig_patent_app_number] => 13361073 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/361073
Stacked packaged integrated circuit devices Jan 29, 2012 Issued
Array ( [id] => 8986571 [patent_doc_number] => 20130213852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-08-22 [patent_title] => 'ELECTRICAL ELEMENT PACKAGE' [patent_app_type] => utility [patent_app_number] => 13/876662 [patent_app_country] => US [patent_app_date] => 2011-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 13641 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13876662 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/876662
ELECTRICAL ELEMENT PACKAGE Sep 29, 2011 Abandoned
Array ( [id] => 7732642 [patent_doc_number] => 20120015512 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-01-19 [patent_title] => 'METHOD OF MANUFACTURING NON-VOLATILE MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 13/238084 [patent_app_country] => US [patent_app_date] => 2011-09-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 7746 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0015/20120015512.pdf [firstpage_image] =>[orig_patent_app_number] => 13238084 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/238084
Method of manufacturing non-volatile memory device Sep 20, 2011 Issued
Array ( [id] => 8875730 [patent_doc_number] => 08470695 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-06-25 [patent_title] => 'Method of manufacturing micromachine having spatial portion within' [patent_app_type] => utility [patent_app_number] => 13/214293 [patent_app_country] => US [patent_app_date] => 2011-08-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 58 [patent_no_of_words] => 21583 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13214293 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/214293
Method of manufacturing micromachine having spatial portion within Aug 21, 2011 Issued
Array ( [id] => 7762674 [patent_doc_number] => 20120032234 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-09 [patent_title] => 'Antiphase Domain Boundary-Free III-V Compound Semiconductor Material on Semiconductor Substrate and Method for Manufacturing Thereof' [patent_app_type] => utility [patent_app_number] => 13/198959 [patent_app_country] => US [patent_app_date] => 2011-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6675 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0032/20120032234.pdf [firstpage_image] =>[orig_patent_app_number] => 13198959 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198959
Antiphase domain boundary-free III-V compound semiconductor material on semiconductor substrate and method for manufacturing thereof Aug 4, 2011 Issued
Array ( [id] => 10178879 [patent_doc_number] => 09209091 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-12-08 [patent_title] => 'Integrated monolithic galvanic isolator' [patent_app_type] => utility [patent_app_number] => 13/198833 [patent_app_country] => US [patent_app_date] => 2011-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 12 [patent_no_of_words] => 5068 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 161 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13198833 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/198833
Integrated monolithic galvanic isolator Aug 4, 2011 Issued
Array ( [id] => 8310467 [patent_doc_number] => 20120187485 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-07-26 [patent_title] => 'SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME' [patent_app_type] => utility [patent_app_number] => 13/204554 [patent_app_country] => US [patent_app_date] => 2011-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 16 [patent_no_of_words] => 7469 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13204554 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/204554
SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING THE SAME Aug 4, 2011 Abandoned
Array ( [id] => 10624531 [patent_doc_number] => 09343480 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-17 [patent_title] => 'Semiconductor device' [patent_app_type] => utility [patent_app_number] => 13/197888 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 65 [patent_no_of_words] => 18992 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 157 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13197888 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197888
Semiconductor device Aug 3, 2011 Issued
Array ( [id] => 7773043 [patent_doc_number] => 20120037955 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-16 [patent_title] => 'Transistor Component with Reduced Short-Circuit Current' [patent_app_type] => utility [patent_app_number] => 13/197903 [patent_app_country] => US [patent_app_date] => 2011-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 9257 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0037/20120037955.pdf [firstpage_image] =>[orig_patent_app_number] => 13197903 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/197903
Transistor component with reduced short-circuit current Aug 3, 2011 Issued
Array ( [id] => 7750288 [patent_doc_number] => 20120025203 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2012-02-02 [patent_title] => 'SEMICONDUCTOR DEVICE' [patent_app_type] => utility [patent_app_number] => 13/194396 [patent_app_country] => US [patent_app_date] => 2011-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 2813 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0025/20120025203.pdf [firstpage_image] =>[orig_patent_app_number] => 13194396 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/194396
SEMICONDUCTOR DEVICE Jul 28, 2011 Abandoned
Array ( [id] => 10073505 [patent_doc_number] => 09111869 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-08-18 [patent_title] => 'Glass/ceramics replacement of epoxy for high temperature hermetically sealed non-axial electronic packages' [patent_app_type] => utility [patent_app_number] => 13/194585 [patent_app_country] => US [patent_app_date] => 2011-07-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 7 [patent_no_of_words] => 3406 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13194585 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/194585
Glass/ceramics replacement of epoxy for high temperature hermetically sealed non-axial electronic packages Jul 28, 2011 Issued
Array ( [id] => 8634646 [patent_doc_number] => 20130026449 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-01-31 [patent_title] => 'Hybrid CMOS Technology with Nanowire Devices and Double Gated Planar Devices' [patent_app_type] => utility [patent_app_number] => 13/189999 [patent_app_country] => US [patent_app_date] => 2011-07-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7186 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13189999 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/189999
Hybrid CMOS technology with nanowire devices and double gated planar devices Jul 24, 2011 Issued
Array ( [id] => 8808330 [patent_doc_number] => 08445983 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-05-21 [patent_title] => 'Semiconductor device for performing photoelectric conversion' [patent_app_type] => utility [patent_app_number] => 13/136004 [patent_app_country] => US [patent_app_date] => 2011-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 6439 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 209 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13136004 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/136004
Semiconductor device for performing photoelectric conversion Jul 19, 2011 Issued
Array ( [id] => 8652984 [patent_doc_number] => 08372730 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-02-12 [patent_title] => 'Method for cutting an electric fuse' [patent_app_type] => utility [patent_app_number] => 13/167429 [patent_app_country] => US [patent_app_date] => 2011-06-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 8884 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13167429 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/167429
Method for cutting an electric fuse Jun 22, 2011 Issued
Array ( [id] => 8920878 [patent_doc_number] => 08486811 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2013-07-16 [patent_title] => 'Semiconductor device and manufacturing process therefor' [patent_app_type] => utility [patent_app_number] => 13/067584 [patent_app_country] => US [patent_app_date] => 2011-06-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 31 [patent_figures_cnt] => 34 [patent_no_of_words] => 13264 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 93 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13067584 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/067584
Semiconductor device and manufacturing process therefor Jun 9, 2011 Issued
Array ( [id] => 8705328 [patent_doc_number] => 20130062617 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2013-03-14 [patent_title] => 'LIGHT EMITTING DIODE STRUCTURE WITH TRANSPARENT CONDUCTIVE HEAT DISSIPATION FILM' [patent_app_type] => utility [patent_app_number] => 13/700398 [patent_app_country] => US [patent_app_date] => 2011-05-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 2143 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13700398 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/700398
LIGHT EMITTING DIODE STRUCTURE WITH TRANSPARENT CONDUCTIVE HEAT DISSIPATION FILM May 20, 2011 Abandoned
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