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Albert Davis Jr.

Examiner (ID: 5456)

Most Active Art Unit
3406
Art Unit(s)
3406, 3405, 3102, 2899, 3407
Total Applications
1496
Issued Applications
1404
Pending Applications
2
Abandoned Applications
90

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20782963 [patent_doc_number] => 20260171161 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => DATA RETENTION READ METHOD [patent_app_type] => utility [patent_app_number] => 18/982579 [patent_app_country] => US [patent_app_date] => 2024-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 21983 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18982579 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/982579
DATA RETENTION READ METHOD Dec 15, 2024 Pending
Array ( [id] => 20782960 [patent_doc_number] => 20260171158 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-06-18 [patent_title] => POST-ERASE READ OF DUMMY WORD LINE TO SUSTAIN THE SUB-BLOCK MODE DURING UNSELECTED SUB-BLOCK DISTURB [patent_app_type] => utility [patent_app_number] => 18/980921 [patent_app_country] => US [patent_app_date] => 2024-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11956 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18980921 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/980921
POST-ERASE READ OF DUMMY WORD LINE TO SUSTAIN THE SUB-BLOCK MODE DURING UNSELECTED SUB-BLOCK DISTURB Dec 12, 2024 Pending
Array ( [id] => 20096075 [patent_doc_number] => 20250226011 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-07-10 [patent_title] => TEMPERATURE-BASED CHARGE PUMP CONTROL [patent_app_type] => utility [patent_app_number] => 18/974897 [patent_app_country] => US [patent_app_date] => 2024-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4967 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 42 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18974897 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/974897
TEMPERATURE-BASED CHARGE PUMP CONTROL Dec 9, 2024 Pending
Array ( [id] => 19850359 [patent_doc_number] => 20250095710 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-20 [patent_title] => REFRESH CONTROL CIRCUIT AND MEMORY [patent_app_type] => utility [patent_app_number] => 18/964499 [patent_app_country] => US [patent_app_date] => 2024-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13170 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 255 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18964499 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/964499
REFRESH CONTROL CIRCUIT AND MEMORY Nov 30, 2024 Pending
Array ( [id] => 19835484 [patent_doc_number] => 20250087270 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-13 [patent_title] => THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY [patent_app_type] => utility [patent_app_number] => 18/953248 [patent_app_country] => US [patent_app_date] => 2024-11-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9827 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18953248 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/953248
THREE DIMENSIONAL STACKED NONVOLATILE SEMICONDUCTOR MEMORY Nov 19, 2024 Pending
Array ( [id] => 19820680 [patent_doc_number] => 20250078887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => MEMORY [patent_app_type] => utility [patent_app_number] => 18/949989 [patent_app_country] => US [patent_app_date] => 2024-11-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9688 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18949989 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/949989
MEMORY Nov 15, 2024 Pending
Array ( [id] => 19803740 [patent_doc_number] => 20250069665 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-27 [patent_title] => MEMORY DEVICE, SYSTEM AND METHOD OF OPERATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/948059 [patent_app_country] => US [patent_app_date] => 2024-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7040 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18948059 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/948059
MEMORY DEVICE, SYSTEM AND METHOD OF OPERATING THE SAME Nov 13, 2024 Pending
Array ( [id] => 20710569 [patent_doc_number] => 20260134907 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-05-14 [patent_title] => FAST LOW-LEAKAGE SRAM CELL [patent_app_type] => utility [patent_app_number] => 18/943789 [patent_app_country] => US [patent_app_date] => 2024-11-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6164 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -28 [patent_words_short_claim] => 68 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18943789 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/943789
FAST LOW-LEAKAGE SRAM CELL Nov 10, 2024 Pending
Array ( [id] => 19757816 [patent_doc_number] => 20250046381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-02-06 [patent_title] => MEMORY DEVICES USING A DYNAMIC LATCH TO PROVIDE MULTIPLE BIAS VOLTAGES [patent_app_type] => utility [patent_app_number] => 18/924115 [patent_app_country] => US [patent_app_date] => 2024-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19157 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 167 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18924115 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/924115
MEMORY DEVICES USING A DYNAMIC LATCH TO PROVIDE MULTIPLE BIAS VOLTAGES Oct 22, 2024 Pending
Array ( [id] => 20010856 [patent_doc_number] => 20250149078 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => DRAM with Analog Refresh Loop [patent_app_type] => utility [patent_app_number] => 18/915412 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4198 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18915412 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/915412
DRAM with Analog Refresh Loop Oct 14, 2024 Pending
Array ( [id] => 20209421 [patent_doc_number] => 20250279141 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-04 [patent_title] => OPTICAL QUATERNARY CONTENT-ADDRESSABLE MEMORY AND ITS OPTICAL COMPUTING APPLICATIONS [patent_app_type] => utility [patent_app_number] => 18/915800 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20861 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18915800 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/915800
OPTICAL QUATERNARY CONTENT-ADDRESSABLE MEMORY AND ITS OPTICAL COMPUTING APPLICATIONS Oct 14, 2024 Pending
Array ( [id] => 20028460 [patent_doc_number] => 20250166682 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => SEMICONDUCTOR DEVICES WITH WRAP-AROUND ARRAYS [patent_app_type] => utility [patent_app_number] => 18/916640 [patent_app_country] => US [patent_app_date] => 2024-10-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9356 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 164 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18916640 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/916640
SEMICONDUCTOR DEVICES WITH WRAP-AROUND ARRAYS Oct 14, 2024 Pending
Array ( [id] => 20653935 [patent_doc_number] => 20260105959 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-04-16 [patent_title] => CURRENT-MODE OPERATION OF ANALOG CONTENT ADDRESSABLE MEMORIES [patent_app_type] => utility [patent_app_number] => 18/914938 [patent_app_country] => US [patent_app_date] => 2024-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3839 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18914938 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/914938
CURRENT-MODE OPERATION OF ANALOG CONTENT ADDRESSABLE MEMORIES Oct 13, 2024 Pending
Array ( [id] => 20617999 [patent_doc_number] => 20260088102 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => REDUCED CURRENT SENSING TECHNIQUES [patent_app_type] => utility [patent_app_number] => 18/897505 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6875 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18897505 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/897505
REDUCED CURRENT SENSING TECHNIQUES Sep 25, 2024 Pending
Array ( [id] => 20618001 [patent_doc_number] => 20260088104 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => READ TECHNIQUES FOR NON-VOLATILE MEMORY [patent_app_type] => utility [patent_app_number] => 18/897714 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8087 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18897714 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/897714
READ TECHNIQUES FOR NON-VOLATILE MEMORY Sep 25, 2024 Pending
Array ( [id] => 20618000 [patent_doc_number] => 20260088103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-26 [patent_title] => THRESHOLD VOLTAGE TRACKING TECHNIQUES FOR MEMORY DEVICES [patent_app_type] => utility [patent_app_number] => 18/897684 [patent_app_country] => US [patent_app_date] => 2024-09-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7144 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18897684 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/897684
THRESHOLD VOLTAGE TRACKING TECHNIQUES FOR MEMORY DEVICES Sep 25, 2024 Pending
Array ( [id] => 20588396 [patent_doc_number] => 20260073992 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => ENABLE OPEN SUB-BLOCK ERASE IN SUB-BLOCK MODE OPERATION [patent_app_type] => utility [patent_app_number] => 18/883214 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10200 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18883214 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/883214
ENABLE OPEN SUB-BLOCK ERASE IN SUB-BLOCK MODE OPERATION Sep 11, 2024 Pending
Array ( [id] => 20588381 [patent_doc_number] => 20260073977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2026-03-12 [patent_title] => Energy Efficient Compute-in-Memory SRAM-C Circuit Architecture [patent_app_type] => utility [patent_app_number] => 18/883400 [patent_app_country] => US [patent_app_date] => 2024-09-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 189 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18883400 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/883400
Energy Efficient Compute-in-Memory SRAM-C Circuit Architecture Sep 11, 2024 Issued
Array ( [id] => 20311739 [patent_doc_number] => 20250329368 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-23 [patent_title] => MEMORY DEVICES, SYSTEMS AND REFRESH ADDRESS GENERATION CIRCUITS [patent_app_type] => utility [patent_app_number] => 18/821685 [patent_app_country] => US [patent_app_date] => 2024-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6006 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 56 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18821685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/821685
MEMORY DEVICES, SYSTEMS AND REFRESH ADDRESS GENERATION CIRCUITS Aug 29, 2024 Pending
Array ( [id] => 19820719 [patent_doc_number] => 20250078926 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-03-06 [patent_title] => NON-VOLATILE MEMORY, RELATED INTEGRATED CIRCUIT, ELECTRONIC SYSTEM AND METHOD [patent_app_type] => utility [patent_app_number] => 18/817969 [patent_app_country] => US [patent_app_date] => 2024-08-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8423 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 342 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18817969 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/817969
NON-VOLATILE MEMORY, RELATED INTEGRATED CIRCUIT, ELECTRONIC SYSTEM AND METHOD Aug 27, 2024 Pending
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