Search

Albert Decady

Supervisory Patent Examiner (ID: 2050, Phone: (571)272-3819 , Office: P/2112 )

Most Active Art Unit
2413
Art Unit(s)
2413, 2121, 2785, 2112, 2784, 2313, 2133
Total Applications
532
Issued Applications
390
Pending Applications
30
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3795452 [patent_doc_number] => 05758056 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Memory system having defective address identification and replacement' [patent_app_type] => 1 [patent_app_number] => 8/598464 [patent_app_country] => US [patent_app_date] => 1996-02-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 9875 [patent_no_of_claims] => 44 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 261 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758056.pdf [firstpage_image] =>[orig_patent_app_number] => 598464 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/598464
Memory system having defective address identification and replacement Feb 7, 1996 Issued
08/598155 METHOD FOR REPAIRING AN ASIC MEMORY WITH REDUNDANCY ROW AND INPUT/OUTPUT LINES Feb 6, 1996 Abandoned
08/594483 APPARATUS AND METHOD FOR IDENTIFYING FALSE TIMING PATHS IN DIGITAL CIRCUITS Jan 30, 1996 Abandoned
Array ( [id] => 3735502 [patent_doc_number] => 05673381 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-09-30 [patent_title] => 'System and parallel streaming and data stripping to back-up a network' [patent_app_type] => 1 [patent_app_number] => 8/591120 [patent_app_country] => US [patent_app_date] => 1996-01-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 7 [patent_no_of_words] => 5587 [patent_no_of_claims] => 81 [patent_no_of_ind_claims] => 16 [patent_words_short_claim] => 191 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/673/05673381.pdf [firstpage_image] =>[orig_patent_app_number] => 591120 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/591120
System and parallel streaming and data stripping to back-up a network Jan 24, 1996 Issued
Array ( [id] => 3871425 [patent_doc_number] => 05768498 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-06-16 [patent_title] => 'Protocol verification using symbolic representations of queues' [patent_app_type] => 1 [patent_app_number] => 8/590239 [patent_app_country] => US [patent_app_date] => 1996-01-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 12 [patent_no_of_words] => 9846 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 220 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/768/05768498.pdf [firstpage_image] =>[orig_patent_app_number] => 590239 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/590239
Protocol verification using symbolic representations of queues Jan 22, 1996 Issued
Array ( [id] => 3666820 [patent_doc_number] => 05623594 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-04-22 [patent_title] => 'Embedded thermistor for on-board thermal monitoring of electrical components' [patent_app_type] => 1 [patent_app_number] => 8/588152 [patent_app_country] => US [patent_app_date] => 1996-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4585 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 88 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/623/05623594.pdf [firstpage_image] =>[orig_patent_app_number] => 588152 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/588152
Embedded thermistor for on-board thermal monitoring of electrical components Jan 17, 1996 Issued
Array ( [id] => 3901991 [patent_doc_number] => 05778013 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'Method and apparatus for verifying CRC codes' [patent_app_type] => 1 [patent_app_number] => 8/584804 [patent_app_country] => US [patent_app_date] => 1996-01-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 11 [patent_no_of_words] => 3147 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778013.pdf [firstpage_image] =>[orig_patent_app_number] => 584804 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/584804
Method and apparatus for verifying CRC codes Jan 10, 1996 Issued
Array ( [id] => 3799198 [patent_doc_number] => 05822334 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-10-13 [patent_title] => 'High speed initialization system for RAM devices using JTAG loop for providing valid parity bits' [patent_app_type] => 1 [patent_app_number] => 8/583377 [patent_app_country] => US [patent_app_date] => 1996-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 8 [patent_no_of_words] => 7856 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/822/05822334.pdf [firstpage_image] =>[orig_patent_app_number] => 583377 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/583377
High speed initialization system for RAM devices using JTAG loop for providing valid parity bits Jan 4, 1996 Issued
Array ( [id] => 3735501 [patent_doc_number] => 05701406 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-12-23 [patent_title] => 'Redundant array of disks with improved storage and recovery speed' [patent_app_type] => 1 [patent_app_number] => 8/582874 [patent_app_country] => US [patent_app_date] => 1996-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 18 [patent_no_of_words] => 10111 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/701/05701406.pdf [firstpage_image] =>[orig_patent_app_number] => 582874 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582874
Redundant array of disks with improved storage and recovery speed Jan 3, 1996 Issued
Array ( [id] => 3775401 [patent_doc_number] => 05742752 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-04-21 [patent_title] => 'Method for performing a RAID stripe write operation using a drive XOR command set' [patent_app_type] => 1 [patent_app_number] => 8/581153 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 5611 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 79 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/742/05742752.pdf [firstpage_image] =>[orig_patent_app_number] => 581153 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581153
Method for performing a RAID stripe write operation using a drive XOR command set Dec 28, 1995 Issued
Array ( [id] => 3755276 [patent_doc_number] => 05787242 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method and apparatus for treatment of deferred write data for a dead raid device' [patent_app_type] => 1 [patent_app_number] => 8/580566 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3292 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787242.pdf [firstpage_image] =>[orig_patent_app_number] => 580566 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580566
Method and apparatus for treatment of deferred write data for a dead raid device Dec 28, 1995 Issued
Array ( [id] => 4039818 [patent_doc_number] => 05884017 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-03-16 [patent_title] => 'Method and system for optical restoration tributary switching in a fiber network' [patent_app_type] => 1 [patent_app_number] => 8/582846 [patent_app_country] => US [patent_app_date] => 1995-12-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5848 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/884/05884017.pdf [firstpage_image] =>[orig_patent_app_number] => 582846 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/582846
Method and system for optical restoration tributary switching in a fiber network Dec 28, 1995 Issued
08/580335 METHOD AND APPARATUS FOR PERFORMING COHERENT BACK-UP OF DASD STORAGE INCLUDING SYNCHRONIZATION ACROSS MULTIPLE DASDS AND PROVIDING DASD CLONING Dec 27, 1995 Abandoned
Array ( [id] => 3523754 [patent_doc_number] => 05564015 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'CPU activity monitoring through cache watching' [patent_app_type] => 1 [patent_app_number] => 8/581305 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8954 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 80 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564015.pdf [firstpage_image] =>[orig_patent_app_number] => 581305 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/581305
CPU activity monitoring through cache watching Dec 27, 1995 Issued
Array ( [id] => 3896551 [patent_doc_number] => 05805797 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-08 [patent_title] => 'Controller having a fail safe function, automatic train controller and system using the same' [patent_app_type] => 1 [patent_app_number] => 8/580336 [patent_app_country] => US [patent_app_date] => 1995-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 24 [patent_figures_cnt] => 25 [patent_no_of_words] => 21274 [patent_no_of_claims] => 37 [patent_no_of_ind_claims] => 18 [patent_words_short_claim] => 41 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/805/05805797.pdf [firstpage_image] =>[orig_patent_app_number] => 580336 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/580336
Controller having a fail safe function, automatic train controller and system using the same Dec 27, 1995 Issued
Array ( [id] => 3793545 [patent_doc_number] => 05809228 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-15 [patent_title] => 'Method and apparatus for combining multiple writes to a memory resource utilizing a write buffer' [patent_app_type] => 1 [patent_app_number] => 8/579414 [patent_app_country] => US [patent_app_date] => 1995-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5739 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 7 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/809/05809228.pdf [firstpage_image] =>[orig_patent_app_number] => 579414 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/579414
Method and apparatus for combining multiple writes to a memory resource utilizing a write buffer Dec 26, 1995 Issued
Array ( [id] => 4017514 [patent_doc_number] => 05859962 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-12 [patent_title] => 'Automated verification of digital design' [patent_app_type] => 1 [patent_app_number] => 8/576655 [patent_app_country] => US [patent_app_date] => 1995-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 4121 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/859/05859962.pdf [firstpage_image] =>[orig_patent_app_number] => 576655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/576655
Automated verification of digital design Dec 20, 1995 Issued
Array ( [id] => 3835507 [patent_doc_number] => 05790777 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-08-04 [patent_title] => 'Computer system analysis device' [patent_app_type] => 1 [patent_app_number] => 8/575225 [patent_app_country] => US [patent_app_date] => 1995-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 6508 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 183 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/790/05790777.pdf [firstpage_image] =>[orig_patent_app_number] => 575225 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/575225
Computer system analysis device Dec 19, 1995 Issued
Array ( [id] => 3755264 [patent_doc_number] => 05787241 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-28 [patent_title] => 'Method and apparatus for locating exception correction routines' [patent_app_type] => 1 [patent_app_number] => 8/574636 [patent_app_country] => US [patent_app_date] => 1995-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 4 [patent_no_of_words] => 4264 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 81 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/787/05787241.pdf [firstpage_image] =>[orig_patent_app_number] => 574636 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/574636
Method and apparatus for locating exception correction routines Dec 17, 1995 Issued
Array ( [id] => 3795517 [patent_doc_number] => 05758061 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-05-26 [patent_title] => 'Computer software testing method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/572795 [patent_app_country] => US [patent_app_date] => 1995-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 11 [patent_no_of_words] => 10970 [patent_no_of_claims] => 29 [patent_no_of_ind_claims] => 8 [patent_words_short_claim] => 52 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/758/05758061.pdf [firstpage_image] =>[orig_patent_app_number] => 572795 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/572795
Computer software testing method and apparatus Dec 14, 1995 Issued
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