| Application number | Title of the application | Filing Date | Status |
|---|
Array
(
[id] => 3914504
[patent_doc_number] => 05751744
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-05-12
[patent_title] => 'Error detection and correction circuit'
[patent_app_type] => 1
[patent_app_number] => 8/379107
[patent_app_country] => US
[patent_app_date] => 1995-01-27
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[pdf_file] => patents/05/751/05751744.pdf
[firstpage_image] =>[orig_patent_app_number] => 379107
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/379107 | Error detection and correction circuit | Jan 26, 1995 | Issued |
Array
(
[id] => 3707424
[patent_doc_number] => 05596711
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-21
[patent_title] => 'Computer failure recovery and alert system'
[patent_app_type] => 1
[patent_app_number] => 8/390499
[patent_app_country] => US
[patent_app_date] => 1995-01-26
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[pdf_file] => patents/05/596/05596711.pdf
[firstpage_image] =>[orig_patent_app_number] => 390499
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/390499 | Computer failure recovery and alert system | Jan 25, 1995 | Issued |
Array
(
[id] => 3599652
[patent_doc_number] => 05553230
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-09-03
[patent_title] => 'Identifying controller pairs in a dual controller disk array'
[patent_app_type] => 1
[patent_app_number] => 8/375097
[patent_app_country] => US
[patent_app_date] => 1995-01-18
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/553/05553230.pdf
[firstpage_image] =>[orig_patent_app_number] => 375097
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/375097 | Identifying controller pairs in a dual controller disk array | Jan 17, 1995 | Issued |
Array
(
[id] => 3639642
[patent_doc_number] => 05621884
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-04-15
[patent_title] => 'Distributed data access system including a plurality of database access processors with one-for-N redundancy'
[patent_app_type] => 1
[patent_app_number] => 8/375388
[patent_app_country] => US
[patent_app_date] => 1995-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
[patent_figures_cnt] => 9
[patent_no_of_words] => 8216
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/621/05621884.pdf
[firstpage_image] =>[orig_patent_app_number] => 375388
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/375388 | Distributed data access system including a plurality of database access processors with one-for-N redundancy | Jan 17, 1995 | Issued |
| 08/371133 | METHOD AND APPARATUS FOR ADDRESSING AND TESTING MORE THAN TWO ATA/IDE DISK DRIVE ASSEMBLIES USING AN ISA BUS | Jan 10, 1995 | Abandoned |
Array
(
[id] => 3593016
[patent_doc_number] => 05581566
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-12-03
[patent_title] => 'High-performance parallel interface to synchronous optical network gateway'
[patent_app_type] => 1
[patent_app_number] => 8/369833
[patent_app_country] => US
[patent_app_date] => 1995-01-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 6
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[patent_no_of_words] => 8320
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[patent_maintenance] => 1
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/581/05581566.pdf
[firstpage_image] =>[orig_patent_app_number] => 369833
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/369833 | High-performance parallel interface to synchronous optical network gateway | Jan 5, 1995 | Issued |
Array
(
[id] => 3692169
[patent_doc_number] => 05633881
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-27
[patent_title] => 'Trellis encoder and decoder based upon punctured rate 1/2 convolutional codes'
[patent_app_type] => 1
[patent_app_number] => 8/368738
[patent_app_country] => US
[patent_app_date] => 1995-01-04
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/633/05633881.pdf
[firstpage_image] =>[orig_patent_app_number] => 368738
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/368738 | Trellis encoder and decoder based upon punctured rate 1/2 convolutional codes | Jan 3, 1995 | Issued |
| 08/364567 | SYSTEM AND METHOD FOR MANAGING FAULTS IN A DISTRIBUTED SYSTEM | Dec 26, 1994 | Abandoned |
Array
(
[id] => 3672120
[patent_doc_number] => 05592610
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-01-07
[patent_title] => 'Method and apparatus for enhancing the fault-tolerance of a network'
[patent_app_type] => 1
[patent_app_number] => 8/363353
[patent_app_country] => US
[patent_app_date] => 1994-12-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
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[patent_no_of_words] => 9738
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[patent_current_assignee] =>[type] => patent
[pdf_file] => patents/05/592/05592610.pdf
[firstpage_image] =>[orig_patent_app_number] => 363353
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/363353 | Method and apparatus for enhancing the fault-tolerance of a network | Dec 20, 1994 | Issued |
Array
(
[id] => 3495396
[patent_doc_number] => 05446879
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-29
[patent_title] => 'Disc changing apparatus with error logging'
[patent_app_type] => 1
[patent_app_number] => 8/359002
[patent_app_country] => US
[patent_app_date] => 1994-12-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 19
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[patent_no_of_claims] => 3
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[pdf_file] => patents/05/446/05446879.pdf
[firstpage_image] =>[orig_patent_app_number] => 359002
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/359002 | Disc changing apparatus with error logging | Dec 15, 1994 | Issued |
| 08/354700 | METHOD AND SYSTEM FOR THE SECURED DISTRIBUTION OF MULTIMEDIA TITLES | Dec 12, 1994 | Abandoned |
Array
(
[id] => 3670795
[patent_doc_number] => 05627964
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-05-06
[patent_title] => 'Reduce or fail-safe bootstrapping of a system having a graphical user interface'
[patent_app_type] => 1
[patent_app_number] => 8/355074
[patent_app_country] => US
[patent_app_date] => 1994-12-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
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[pdf_file] => patents/05/627/05627964.pdf
[firstpage_image] =>[orig_patent_app_number] => 355074
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/355074 | Reduce or fail-safe bootstrapping of a system having a graphical user interface | Dec 12, 1994 | Issued |
| 08/353404 | SEMICONDUCTOR INTEGRATED CIRCUIT HAVING COMPRESSION CIRCUITRY FOR COMPRESSING TEST DATA, AND THE TEST SYSTEM AND METHOD FOR UTILIZING THE SEMICONDUCTOR INTEGRATED CIRCUIT | Dec 8, 1994 | Abandoned |
| 08/349148 | PACKET FRAMER | Dec 1, 1994 | Abandoned |
Array
(
[id] => 3502982
[patent_doc_number] => 05440729
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1995-08-08
[patent_title] => 'Method for handling error information between channel unit and central computer'
[patent_app_type] => 1
[patent_app_number] => 8/353373
[patent_app_country] => US
[patent_app_date] => 1994-12-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
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[pdf_file] => patents/05/440/05440729.pdf
[firstpage_image] =>[orig_patent_app_number] => 353373
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/353373 | Method for handling error information between channel unit and central computer | Dec 1, 1994 | Issued |
Array
(
[id] => 3635012
[patent_doc_number] => 05613059
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1997-03-18
[patent_title] => 'On-line restoration of redundancy information in a redundant array system'
[patent_app_type] => 1
[patent_app_number] => 8/349766
[patent_app_country] => US
[patent_app_date] => 1994-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
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[pdf_file] => patents/05/613/05613059.pdf
[firstpage_image] =>[orig_patent_app_number] => 349766
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/349766 | On-line restoration of redundancy information in a redundant array system | Nov 30, 1994 | Issued |
| 08/343395 | DIGITAL PROCESSOR WITH EMBEDDED EEPROM MEMORY | Nov 21, 1994 | Abandoned |
Array
(
[id] => 3602601
[patent_doc_number] => 05488701
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1996-01-30
[patent_title] => 'In log sparing for log structured arrays'
[patent_app_type] => 1
[patent_app_number] => 8/340977
[patent_app_country] => US
[patent_app_date] => 1994-11-17
[patent_effective_date] => 0000-00-00
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[pdf_file] => patents/05/488/05488701.pdf
[firstpage_image] =>[orig_patent_app_number] => 340977
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/340977 | In log sparing for log structured arrays | Nov 16, 1994 | Issued |
Array
(
[id] => 3778171
[patent_doc_number] => 05845065
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-12-01
[patent_title] => 'Network license compliance apparatus and method'
[patent_app_type] => 1
[patent_app_number] => 8/340263
[patent_app_country] => US
[patent_app_date] => 1994-11-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 36
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[pdf_file] => patents/05/845/05845065.pdf
[firstpage_image] =>[orig_patent_app_number] => 340263
[rel_patent_id] =>[rel_patent_doc_number] =>) 08/340263 | Network license compliance apparatus and method | Nov 14, 1994 | Issued |
| 08/340163 | CIRCUITS, SYSTEMS, AND METHODS FOR ACCOUNTING FOR DEFECTIVE CELLS IN A MEMORY DEVICE | Nov 14, 1994 | Abandoned |