Search

Albert Decady

Supervisory Patent Examiner (ID: 2050, Phone: (571)272-3819 , Office: P/2112 )

Most Active Art Unit
2413
Art Unit(s)
2413, 2121, 2785, 2112, 2784, 2313, 2133
Total Applications
532
Issued Applications
390
Pending Applications
30
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3599778 [patent_doc_number] => 05553239 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Management facility for server entry and application utilization in a multi-node server configuration' [patent_app_type] => 1 [patent_app_number] => 8/337943 [patent_app_country] => US [patent_app_date] => 1994-11-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5799 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/553/05553239.pdf [firstpage_image] =>[orig_patent_app_number] => 337943 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/337943
Management facility for server entry and application utilization in a multi-node server configuration Nov 9, 1994 Issued
08/337582 MEDIA RECOVERY WITH TIME-SPLIT B-TREES Nov 8, 1994 Abandoned
Array ( [id] => 3432107 [patent_doc_number] => 05479611 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'Disk array apparatus' [patent_app_type] => 1 [patent_app_number] => 8/334387 [patent_app_country] => US [patent_app_date] => 1994-11-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 8 [patent_no_of_words] => 5276 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 441 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479611.pdf [firstpage_image] =>[orig_patent_app_number] => 334387 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/334387
Disk array apparatus Nov 2, 1994 Issued
Array ( [id] => 3695417 [patent_doc_number] => 05634096 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-05-27 [patent_title] => 'Using virtual disks for disk system checkpointing' [patent_app_type] => 1 [patent_app_number] => 8/332156 [patent_app_country] => US [patent_app_date] => 1994-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3744 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 139 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/634/05634096.pdf [firstpage_image] =>[orig_patent_app_number] => 332156 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/332156
Using virtual disks for disk system checkpointing Oct 30, 1994 Issued
Array ( [id] => 3432731 [patent_doc_number] => 05479652 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-12-26 [patent_title] => 'Microprocessor with an external command mode for diagnosis and debugging' [patent_app_type] => 1 [patent_app_number] => 8/327229 [patent_app_country] => US [patent_app_date] => 1994-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6339 [patent_no_of_claims] => 36 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/479/05479652.pdf [firstpage_image] =>[orig_patent_app_number] => 327229 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/327229
Microprocessor with an external command mode for diagnosis and debugging Oct 20, 1994 Issued
Array ( [id] => 3760795 [patent_doc_number] => 05802266 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it' [patent_app_type] => 1 [patent_app_number] => 8/323094 [patent_app_country] => US [patent_app_date] => 1994-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 28 [patent_figures_cnt] => 50 [patent_no_of_words] => 16626 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802266.pdf [firstpage_image] =>[orig_patent_app_number] => 323094 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/323094
Logic circuit having error detection function, redundant resource management method, and fault tolerant system using it Oct 13, 1994 Issued
Array ( [id] => 3539872 [patent_doc_number] => 05542043 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-30 [patent_title] => 'Method and system for automatically generating efficient test cases for systems having interacting elements' [patent_app_type] => 1 [patent_app_number] => 8/321185 [patent_app_country] => US [patent_app_date] => 1994-10-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5973 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/542/05542043.pdf [firstpage_image] =>[orig_patent_app_number] => 321185 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/321185
Method and system for automatically generating efficient test cases for systems having interacting elements Oct 10, 1994 Issued
Array ( [id] => 3569217 [patent_doc_number] => 05544310 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-08-06 [patent_title] => 'System and method for testing distributed systems' [patent_app_type] => 1 [patent_app_number] => 8/318017 [patent_app_country] => US [patent_app_date] => 1994-10-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3151 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/544/05544310.pdf [firstpage_image] =>[orig_patent_app_number] => 318017 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/318017
System and method for testing distributed systems Oct 3, 1994 Issued
Array ( [id] => 3525168 [patent_doc_number] => 05564111 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Method and apparatus for implementing a non-blocking translation lookaside buffer' [patent_app_type] => 1 [patent_app_number] => 8/315833 [patent_app_country] => US [patent_app_date] => 1994-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 6370 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 74 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564111.pdf [firstpage_image] =>[orig_patent_app_number] => 315833 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/315833
Method and apparatus for implementing a non-blocking translation lookaside buffer Sep 29, 1994 Issued
Array ( [id] => 3439326 [patent_doc_number] => 05455938 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-03 [patent_title] => 'Network based machine instruction generator for design verification' [patent_app_type] => 1 [patent_app_number] => 8/306267 [patent_app_country] => US [patent_app_date] => 1994-09-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 8961 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/455/05455938.pdf [firstpage_image] =>[orig_patent_app_number] => 306267 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/306267
Network based machine instruction generator for design verification Sep 13, 1994 Issued
Array ( [id] => 3626512 [patent_doc_number] => 05511185 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-23 [patent_title] => 'System for automatic testing of computer software having output synchronization and capable of responding to asynchronous events' [patent_app_type] => 1 [patent_app_number] => 8/298357 [patent_app_country] => US [patent_app_date] => 1994-08-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 54 [patent_figures_cnt] => 66 [patent_no_of_words] => 16743 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/511/05511185.pdf [firstpage_image] =>[orig_patent_app_number] => 298357 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/298357
System for automatic testing of computer software having output synchronization and capable of responding to asynchronous events Aug 29, 1994 Issued
08/297273 FAULT MANAGEMENT SCHEME FOR A CACHE MEMORY Aug 25, 1994 Abandoned
08/294703 DISTRIBUTED SUBSYSTEM SPARING Aug 22, 1994 Abandoned
Array ( [id] => 3604189 [patent_doc_number] => 05568607 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-22 [patent_title] => 'Apparatus, systems and methods for controlling power consumption in a selectively enabled processing system' [patent_app_type] => 1 [patent_app_number] => 8/292863 [patent_app_country] => US [patent_app_date] => 1994-08-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4675 [patent_no_of_claims] => 41 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 152 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/568/05568607.pdf [firstpage_image] =>[orig_patent_app_number] => 292863 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/292863
Apparatus, systems and methods for controlling power consumption in a selectively enabled processing system Aug 18, 1994 Issued
Array ( [id] => 3517501 [patent_doc_number] => 05570383 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-29 [patent_title] => 'Timing hazard detector accelerator' [patent_app_type] => 1 [patent_app_number] => 8/290477 [patent_app_country] => US [patent_app_date] => 1994-08-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 5571 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/570/05570383.pdf [firstpage_image] =>[orig_patent_app_number] => 290477 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/290477
Timing hazard detector accelerator Aug 14, 1994 Issued
08/287965 APPARATUS AND METHOD FOR IDENTIFYING FALSE TIMING PATHS IN DIGITAL CIRCUITS Aug 8, 1994 Abandoned
Array ( [id] => 3539367 [patent_doc_number] => 05528749 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-18 [patent_title] => 'Automatic instrument turn off/on for error correction' [patent_app_type] => 1 [patent_app_number] => 8/286472 [patent_app_country] => US [patent_app_date] => 1994-08-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1714 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 149 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/528/05528749.pdf [firstpage_image] =>[orig_patent_app_number] => 286472 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/286472
Automatic instrument turn off/on for error correction Aug 4, 1994 Issued
Array ( [id] => 3529527 [patent_doc_number] => 05506959 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-09 [patent_title] => 'Method and apparatus for testing electronic memories for the presence of multiple cell coupling faults' [patent_app_type] => 1 [patent_app_number] => 8/284997 [patent_app_country] => US [patent_app_date] => 1994-08-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 69 [patent_figures_cnt] => 77 [patent_no_of_words] => 16516 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 117 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/506/05506959.pdf [firstpage_image] =>[orig_patent_app_number] => 284997 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/284997
Method and apparatus for testing electronic memories for the presence of multiple cell coupling faults Aug 3, 1994 Issued
Array ( [id] => 3672236 [patent_doc_number] => 05592619 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-07 [patent_title] => 'High-security IC card' [patent_app_type] => 1 [patent_app_number] => 8/281213 [patent_app_country] => US [patent_app_date] => 1994-07-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 12 [patent_no_of_words] => 4961 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/592/05592619.pdf [firstpage_image] =>[orig_patent_app_number] => 281213 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/281213
High-security IC card Jul 26, 1994 Issued
Array ( [id] => 3625892 [patent_doc_number] => 05535330 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-09 [patent_title] => 'System and method for error location in printed wire assemblies by external power on self test (post) commands' [patent_app_type] => 1 [patent_app_number] => 8/279759 [patent_app_country] => US [patent_app_date] => 1994-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4027 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/535/05535330.pdf [firstpage_image] =>[orig_patent_app_number] => 279759 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/279759
System and method for error location in printed wire assemblies by external power on self test (post) commands Jul 21, 1994 Issued
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