
Albert Decady
Supervisory Patent Examiner (ID: 9991, Phone: (571)272-3819 , Office: P/2112 )
| Most Active Art Unit | 2413 |
| Art Unit(s) | 2413, 2785, 2313, 2121, 2784, 2133, 2112 |
| Total Applications | 532 |
| Issued Applications | 390 |
| Pending Applications | 30 |
| Abandoned Applications | 112 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18833913
[patent_doc_number] => 20230402440
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-12-14
[patent_title] => DISPLAY PANEL, DISPLAY SCREEN, AND MANUFACTURING METHOD OF DISPLAY SCREEN
[patent_app_type] => utility
[patent_app_number] => 18/083845
[patent_app_country] => US
[patent_app_date] => 2022-12-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7537
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 138
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18083845
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/083845 | DISPLAY PANEL, DISPLAY SCREEN, AND MANUFACTURING METHOD OF DISPLAY SCREEN | Dec 18, 2022 | Pending |
Array
(
[id] => 18533265
[patent_doc_number] => 20230238341
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-27
[patent_title] => THICK BONDING PAD STRUCTURE FOR WIRE BOND STRESS REDUCTION
[patent_app_type] => utility
[patent_app_number] => 18/079610
[patent_app_country] => US
[patent_app_date] => 2022-12-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2335
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18079610
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/079610 | THICK BONDING PAD STRUCTURE FOR WIRE BOND STRESS REDUCTION | Dec 11, 2022 | Pending |
Array
(
[id] => 19237336
[patent_doc_number] => 20240194531
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-06-13
[patent_title] => THREE-DIMENSIONALLY INTEGRATED STRUCTURE AND METHOD FOR FABRICATING SAME
[patent_app_type] => utility
[patent_app_number] => 18/076909
[patent_app_country] => US
[patent_app_date] => 2022-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4024
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 91
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18076909
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/076909 | THREE-DIMENSIONALLY INTEGRATED STRUCTURE AND METHOD FOR FABRICATING SAME | Dec 6, 2022 | Pending |
Array
(
[id] => 18456254
[patent_doc_number] => 20230197536
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => DISPLAY PANEL AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/073508
[patent_app_country] => US
[patent_app_date] => 2022-12-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4206
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18073508
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/073508 | DISPLAY PANEL AND MANUFACTURING METHOD THEREOF | Nov 30, 2022 | Pending |
Array
(
[id] => 18458981
[patent_doc_number] => 20230200263
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-22
[patent_title] => Quantum Bit Chip and Method for Fabricating Quantum Bit Chip
[patent_app_type] => utility
[patent_app_number] => 18/060389
[patent_app_country] => US
[patent_app_date] => 2022-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5584
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 108
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18060389
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/060389 | Quantum Bit Chip and Method for Fabricating Quantum Bit Chip | Nov 29, 2022 | Pending |
Array
(
[id] => 19688157
[patent_doc_number] => 20250006702
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => Three-dimensional Stack Package Structure And Method Making The Same
[patent_app_type] => utility
[patent_app_number] => 18/547152
[patent_app_country] => US
[patent_app_date] => 2022-11-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8518
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 164
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18547152
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/547152 | Three-dimensional Stack Package Structure And Method Making The Same | Oct 31, 2022 | Pending |
Array
(
[id] => 18306502
[patent_doc_number] => 20230110402
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR PACKAGING
[patent_app_type] => utility
[patent_app_number] => 17/938471
[patent_app_country] => US
[patent_app_date] => 2022-10-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3811
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17938471
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/938471 | SEMICONDUCTOR DEVICE AND METHOD FOR PACKAGING | Oct 5, 2022 | Abandoned |
Array
(
[id] => 18570551
[patent_doc_number] => 20230260888
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-08-17
[patent_title] => PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/958952
[patent_app_country] => US
[patent_app_date] => 2022-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10593
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958952
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/958952 | PACKAGE SUBSTRATE AND SEMICONDUCTOR PACKAGE INCLUDING THE SAME | Oct 2, 2022 | Pending |
Array
(
[id] => 18346207
[patent_doc_number] => 20230134317
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-05-04
[patent_title] => ELECTRICAL CONNECTION STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/958452
[patent_app_country] => US
[patent_app_date] => 2022-10-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7960
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 117
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17958452
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/958452 | ELECTRICAL CONNECTION STRUCTURE AND ELECTRONIC DEVICE INCLUDING THE SAME | Oct 2, 2022 | Pending |
Array
(
[id] => 18475638
[patent_doc_number] => 20230209926
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/951977
[patent_app_country] => US
[patent_app_date] => 2022-09-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11757
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17951977
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/951977 | DISPLAY APPARATUS AND METHOD OF MANUFACTURING THE SAME | Sep 22, 2022 | Pending |
Array
(
[id] => 18255517
[patent_doc_number] => 20230082556
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => DESIGN TECHNIQUE OF WIRING TO BE PROVIDED ON WIRING CIRCUIT BOARD TO BE MOUNTED IN ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 17/940140
[patent_app_country] => US
[patent_app_date] => 2022-09-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8621
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 265
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17940140
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/940140 | Technique of wiring provided on a wiring circuit board that is mounted in an electronic apparatus | Sep 7, 2022 | Issued |
Array
(
[id] => 18297868
[patent_doc_number] => 20230107554
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-06
[patent_title] => SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/899891
[patent_app_country] => US
[patent_app_date] => 2022-08-31
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 11831
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 136
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899891
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/899891 | SEMICONDUCTOR PACKAGE AND MANUFACTURING METHOD THEREOF | Aug 30, 2022 | Pending |
Array
(
[id] => 18617641
[patent_doc_number] => 20230284382
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-09-07
[patent_title] => SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/894756
[patent_app_country] => US
[patent_app_date] => 2022-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9196
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 78
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894756
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/894756 | SEMICONDUCTOR DEVICE, ELECTRONIC DEVICE, AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE | Aug 23, 2022 | Pending |
Array
(
[id] => 19009977
[patent_doc_number] => 20240074048
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT
[patent_app_type] => utility
[patent_app_number] => 17/894070
[patent_app_country] => US
[patent_app_date] => 2022-08-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4677
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 87
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17894070
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/894070 | SEMICONDUCTOR PACKAGING WITH REDUCED STANDOFF HEIGHT | Aug 22, 2022 | Pending |
Array
(
[id] => 20638139
[patent_doc_number] => 12599038
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-04-07
[patent_title] => Display device with a heat dissipation substrate and a cover substrate
[patent_app_type] => utility
[patent_app_number] => 17/821118
[patent_app_country] => US
[patent_app_date] => 2022-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 28
[patent_figures_cnt] => 28
[patent_no_of_words] => 12227
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 141
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17821118
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/821118 | Display device with a heat dissipation substrate and a cover substrate | Aug 18, 2022 | Issued |
Array
(
[id] => 18210493
[patent_doc_number] => 20230056755
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-23
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 17/891886
[patent_app_country] => US
[patent_app_date] => 2022-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6495
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 97
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17891886
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/891886 | Semiconductor package | Aug 18, 2022 | Abandoned |
Array
(
[id] => 18253597
[patent_doc_number] => 20230080636
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-03-16
[patent_title] => DEVICE STRUCTURE FOR POWER SEMICONDUCTOR TRANSISTOR
[patent_app_type] => utility
[patent_app_number] => 17/881096
[patent_app_country] => US
[patent_app_date] => 2022-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 1878
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17881096
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/881096 | DEVICE STRUCTURE FOR POWER SEMICONDUCTOR TRANSISTOR | Aug 3, 2022 | Pending |
Array
(
[id] => 18307674
[patent_doc_number] => 20230111574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-04-13
[patent_title] => DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/876407
[patent_app_country] => US
[patent_app_date] => 2022-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 15866
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -24
[patent_words_short_claim] => 254
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876407
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/876407 | DISPLAY DEVICE | Jul 27, 2022 | Pending |
Array
(
[id] => 19966628
[patent_doc_number] => 12336165
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-17
[patent_title] => Manufacturing method of semiconductor structure and semiconductor structure with different functional regions
[patent_app_type] => utility
[patent_app_number] => 17/908298
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 30
[patent_figures_cnt] => 30
[patent_no_of_words] => 1195
[patent_no_of_claims] => 15
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 199
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17908298
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/908298 | Manufacturing method of semiconductor structure and semiconductor structure with different functional regions | Jul 19, 2022 | Issued |
Array
(
[id] => 18883002
[patent_doc_number] => 20240006371
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-01-04
[patent_title] => SEMICONDUCTOR DEVICE INTERCONNECT STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 17/809574
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7178
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 114
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17809574
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/809574 | SEMICONDUCTOR DEVICE INTERCONNECT STRUCTURE | Jun 28, 2022 | Pending |