Search

Albert Decady

Supervisory Patent Examiner (ID: 2050, Phone: (571)272-3819 , Office: P/2112 )

Most Active Art Unit
2413
Art Unit(s)
2413, 2121, 2785, 2112, 2784, 2313, 2133
Total Applications
532
Issued Applications
390
Pending Applications
30
Abandoned Applications
112

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 954837 [patent_doc_number] => 06959256 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-10-25 [patent_title] => 'Universally accessible fully programmable memory built-in self-test (MBIST) system and method' [patent_app_type] => utility [patent_app_number] => 10/776762 [patent_app_country] => US [patent_app_date] => 2004-02-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 3872 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 111 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/959/06959256.pdf [firstpage_image] =>[orig_patent_app_number] => 10776762 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/776762
Universally accessible fully programmable memory built-in self-test (MBIST) system and method Feb 10, 2004 Issued
Array ( [id] => 1052661 [patent_doc_number] => 06862703 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2005-03-01 [patent_title] => 'Apparatus for testing memories with redundant storage elements' [patent_app_type] => utility [patent_app_number] => 09/929712 [patent_app_country] => US [patent_app_date] => 2001-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 19 [patent_no_of_words] => 10062 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 134 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/862/06862703.pdf [firstpage_image] =>[orig_patent_app_number] => 09929712 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/929712
Apparatus for testing memories with redundant storage elements Aug 12, 2001 Issued
Array ( [id] => 5857467 [patent_doc_number] => 20020122221 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2002-09-05 [patent_title] => 'Optical transmission system, fec multiplexer, fec multiplexer/separator, and error correction method' [patent_app_type] => new [patent_app_number] => 10/031235 [patent_app_country] => US [patent_app_date] => 2002-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 6723 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] => publications/A1/0122/20020122221.pdf [firstpage_image] =>[orig_patent_app_number] => 10031235 [rel_patent_id] =>[rel_patent_doc_number] =>)
10/031235
Optical transmission system, fec multiplexer, fec multiplexer/separator, and error correction method May 15, 2001 Issued
Array ( [id] => 981696 [patent_doc_number] => 06931541 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2005-08-16 [patent_title] => 'Information processing apparatus and method' [patent_app_type] => utility [patent_app_number] => 09/537291 [patent_app_country] => US [patent_app_date] => 2000-03-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 6 [patent_no_of_words] => 4351 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/931/06931541.pdf [firstpage_image] =>[orig_patent_app_number] => 09537291 [rel_patent_id] =>[rel_patent_doc_number] =>)
09/537291
Information processing apparatus and method Mar 28, 2000 Issued
09/508823 CIRCUIT CONFIGURATION AND METHOD FOR FORWARD ERROR CORRECTION Mar 15, 2000 Abandoned
09/145913 INFORMATION GENERATING METHOD AND APPARATUS, INFORMATION REPRODUCING METHOD AND APPARATUS, AND INFORMATION RECORD MEDIUM Sep 1, 1998 Abandoned
09/014263 MULTIRATE GENERATOR AND MULTIRATE GENERATING METHOD Jan 26, 1998 Issued
Array ( [id] => 4086058 [patent_doc_number] => 06009553 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-28 [patent_title] => 'Adaptive error correction for a communications link' [patent_app_type] => 1 [patent_app_number] => 8/991587 [patent_app_country] => US [patent_app_date] => 1997-12-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 5585 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/009/06009553.pdf [firstpage_image] =>[orig_patent_app_number] => 991587 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/991587
Adaptive error correction for a communications link Dec 14, 1997 Issued
Array ( [id] => 3829088 [patent_doc_number] => 05812751 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-22 [patent_title] => 'Multi-server fault tolerance using in-band signalling' [patent_app_type] => 1 [patent_app_number] => 8/943655 [patent_app_country] => US [patent_app_date] => 1997-10-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 12208 [patent_no_of_claims] => 25 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 130 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/812/05812751.pdf [firstpage_image] =>[orig_patent_app_number] => 943655 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/943655
Multi-server fault tolerance using in-band signalling Oct 2, 1997 Issued
Array ( [id] => 3916061 [patent_doc_number] => 05951670 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-14 [patent_title] => 'Segment register renaming in an out of order processor' [patent_app_type] => 1 [patent_app_number] => 8/923496 [patent_app_country] => US [patent_app_date] => 1997-09-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 6935 [patent_no_of_claims] => 1 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 205 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/951/05951670.pdf [firstpage_image] =>[orig_patent_app_number] => 923496 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/923496
Segment register renaming in an out of order processor Sep 3, 1997 Issued
Array ( [id] => 4047499 [patent_doc_number] => 05857071 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-05 [patent_title] => 'Computer process resource modelling method and apparatus' [patent_app_type] => 1 [patent_app_number] => 8/902714 [patent_app_country] => US [patent_app_date] => 1997-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 52 [patent_no_of_words] => 40128 [patent_no_of_claims] => 3 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/857/05857071.pdf [firstpage_image] =>[orig_patent_app_number] => 902714 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/902714
Computer process resource modelling method and apparatus Jul 29, 1997 Issued
Array ( [id] => 4068226 [patent_doc_number] => 05864565 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-26 [patent_title] => 'Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system and method for utilizing the semiconductor integrated circuit' [patent_app_type] => 1 [patent_app_number] => 8/881946 [patent_app_country] => US [patent_app_date] => 1997-06-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 2898 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/864/05864565.pdf [firstpage_image] =>[orig_patent_app_number] => 881946 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/881946
Semiconductor integrated circuit having compression circuitry for compressing test data, and the test system and method for utilizing the semiconductor integrated circuit Jun 24, 1997 Issued
Array ( [id] => 3992290 [patent_doc_number] => 05917999 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-06-29 [patent_title] => 'Storage unit subsystem' [patent_app_type] => 1 [patent_app_number] => 8/877627 [patent_app_country] => US [patent_app_date] => 1997-06-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 82 [patent_figures_cnt] => 87 [patent_no_of_words] => 23702 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/917/05917999.pdf [firstpage_image] =>[orig_patent_app_number] => 877627 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/877627
Storage unit subsystem Jun 17, 1997 Issued
Array ( [id] => 3909501 [patent_doc_number] => 05835699 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-11-10 [patent_title] => 'Breakpoint setting/deleting system using a symbolic debugger in a digital data processing system' [patent_app_type] => 1 [patent_app_number] => 8/876479 [patent_app_country] => US [patent_app_date] => 1997-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 1813 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 254 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/835/05835699.pdf [firstpage_image] =>[orig_patent_app_number] => 876479 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/876479
Breakpoint setting/deleting system using a symbolic debugger in a digital data processing system Jun 15, 1997 Issued
Array ( [id] => 3904248 [patent_doc_number] => 05778167 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-07-07 [patent_title] => 'System and method for reassigning a storage location for reconstructed data on a persistent medium storage system' [patent_app_type] => 1 [patent_app_number] => 8/873635 [patent_app_country] => US [patent_app_date] => 1997-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 2944 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 177 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/778/05778167.pdf [firstpage_image] =>[orig_patent_app_number] => 873635 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/873635
System and method for reassigning a storage location for reconstructed data on a persistent medium storage system Jun 11, 1997 Issued
Array ( [id] => 3780730 [patent_doc_number] => 05850404 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-12-15 [patent_title] => 'Fault block detecting system using abnormal current' [patent_app_type] => 1 [patent_app_number] => 8/954990 [patent_app_country] => US [patent_app_date] => 1997-06-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 25 [patent_no_of_words] => 5853 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 179 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/850/05850404.pdf [firstpage_image] =>[orig_patent_app_number] => 954990 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/954990
Fault block detecting system using abnormal current Jun 5, 1997 Issued
Array ( [id] => 3760836 [patent_doc_number] => 05802268 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1998-09-01 [patent_title] => 'Digital processor with embedded eeprom memory' [patent_app_type] => 1 [patent_app_number] => 8/856035 [patent_app_country] => US [patent_app_date] => 1997-05-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 4 [patent_no_of_words] => 2759 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 87 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/802/05802268.pdf [firstpage_image] =>[orig_patent_app_number] => 856035 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/856035
Digital processor with embedded eeprom memory May 13, 1997 Issued
Array ( [id] => 3997304 [patent_doc_number] => 05862315 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-01-19 [patent_title] => 'Process control interface system having triply redundant remote field units' [patent_app_type] => 1 [patent_app_number] => 8/854966 [patent_app_country] => US [patent_app_date] => 1997-05-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 209 [patent_figures_cnt] => 271 [patent_no_of_words] => 55315 [patent_no_of_claims] => 62 [patent_no_of_ind_claims] => 15 [patent_words_short_claim] => 29 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/862/05862315.pdf [firstpage_image] =>[orig_patent_app_number] => 854966 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/854966
Process control interface system having triply redundant remote field units May 11, 1997 Issued
Array ( [id] => 4025702 [patent_doc_number] => 06006345 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-12-21 [patent_title] => 'Pattern generator for memory burn-in and test' [patent_app_type] => 1 [patent_app_number] => 8/853597 [patent_app_country] => US [patent_app_date] => 1997-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 3556 [patent_no_of_claims] => 32 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/06/006/06006345.pdf [firstpage_image] =>[orig_patent_app_number] => 853597 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/853597
Pattern generator for memory burn-in and test May 8, 1997 Issued
Array ( [id] => 3940148 [patent_doc_number] => 05954830 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1999-09-21 [patent_title] => 'Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs' [patent_app_type] => 1 [patent_app_number] => 8/831257 [patent_app_country] => US [patent_app_date] => 1997-04-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 4802 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/954/05954830.pdf [firstpage_image] =>[orig_patent_app_number] => 831257 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/831257
Method and apparatus for achieving higher performance data compression in ABIST testing by reducing the number of data outputs Apr 7, 1997 Issued
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