Search

Albert Kang Wong

Examiner (ID: 14906, Phone: (571)272-3057 , Office: P/3649 )

Most Active Art Unit
2612
Art Unit(s)
2612, 3649, 2689, 2617, 2735, 2635, 2683, 2685
Total Applications
1756
Issued Applications
1254
Pending Applications
128
Abandoned Applications
379

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 20020407 [patent_doc_number] => 20250158629 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => DEVICE AND METHODS FOR RECONFIGURABLE ANALOG INPUT MONITORING [patent_app_type] => utility [patent_app_number] => 18/440552 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 35 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/440552
DEVICE AND METHODS FOR RECONFIGURABLE ANALOG INPUT MONITORING Feb 12, 2024 Pending
Array ( [id] => 19393586 [patent_doc_number] => 20240283456 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => Operation stage of pipeline analog-to-digital converter (ADC) and multiplying circuit thereof [patent_app_type] => utility [patent_app_number] => 18/420801 [patent_app_country] => US [patent_app_date] => 2024-01-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4184 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 194 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18420801 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/420801
Operation stage of pipeline analog-to-digital converter (ADC) and multiplying circuit thereof Jan 23, 2024 Issued
Array ( [id] => 20020409 [patent_doc_number] => 20250158631 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-15 [patent_title] => METHODS AND SYSTEMS OF UTILIZING ANALOG-TO-DIGITAL CONVERTER (ADC) FOR MULTIPLY-ACCUMULATOR (MAC) [patent_app_type] => utility [patent_app_number] => 18/414882 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 196 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414882 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414882
METHODS AND SYSTEMS OF UTILIZING ANALOG-TO-DIGITAL CONVERTER (ADC) FOR MULTIPLY-ACCUMULATOR (MAC) Jan 16, 2024 Pending
Array ( [id] => 19365020 [patent_doc_number] => 20240267054 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-08 [patent_title] => Signal receiving circuit and calibration method thereof [patent_app_type] => utility [patent_app_number] => 18/414501 [patent_app_country] => US [patent_app_date] => 2024-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3310 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 100 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414501 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/414501
Signal receiving circuit and calibration method thereof Jan 16, 2024 Issued
Array ( [id] => 20360644 [patent_doc_number] => 12476652 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => 1-bit digital-to-analog converter, signal processing device, transmitter, and conversion method [patent_app_type] => utility [patent_app_number] => 18/413992 [patent_app_country] => US [patent_app_date] => 2024-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 2306 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 58 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18413992 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/413992
1-bit digital-to-analog converter, signal processing device, transmitter, and conversion method Jan 15, 2024 Issued
Array ( [id] => 20495659 [patent_doc_number] => 12537541 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => Method and apparatus with data compression and/or decompression [patent_app_type] => utility [patent_app_number] => 18/406521 [patent_app_country] => US [patent_app_date] => 2024-01-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 13 [patent_no_of_words] => 6603 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 75 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406521 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406521
Method and apparatus with data compression and/or decompression Jan 7, 2024 Issued
Array ( [id] => 20456420 [patent_doc_number] => 12519483 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-06 [patent_title] => Low-latency, average input current cancellation for differential input, voltage-sensing, switched-capacitor, sigma-delta modulators [patent_app_type] => utility [patent_app_number] => 18/406114 [patent_app_country] => US [patent_app_date] => 2024-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 23 [patent_no_of_words] => 5857 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 216 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18406114 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/406114
Low-latency, average input current cancellation for differential input, voltage-sensing, switched-capacitor, sigma-delta modulators Jan 5, 2024 Issued
Array ( [id] => 20360642 [patent_doc_number] => 12476650 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-11-18 [patent_title] => Method for calibrating analog-to-digital converter [patent_app_type] => utility [patent_app_number] => 18/399607 [patent_app_country] => US [patent_app_date] => 2023-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 0 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 740 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18399607 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/399607
Method for calibrating analog-to-digital converter Dec 27, 2023 Issued
Array ( [id] => 19306993 [patent_doc_number] => 20240235573 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-11 [patent_title] => ON CHIP TEST ARCHITECTURE FOR CONTINUOUS TIME DELTA SIGMA ANALOG-TO-DIGITAL CONVERTER [patent_app_type] => utility [patent_app_number] => 18/396542 [patent_app_country] => US [patent_app_date] => 2023-12-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6817 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396542 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/396542
On chip test architecture for continuous time delta sigma analog-to-digital converter Dec 25, 2023 Issued
Array ( [id] => 20267549 [patent_doc_number] => 12438551 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Analog-to-digital converter [patent_app_type] => utility [patent_app_number] => 18/391789 [patent_app_country] => US [patent_app_date] => 2023-12-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 17 [patent_no_of_words] => 0 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18391789 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/391789
Analog-to-digital converter Dec 20, 2023 Issued
Array ( [id] => 20435315 [patent_doc_number] => 12506495 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-23 [patent_title] => Polar encoding method and apparatus and polar decoding method and apparatus [patent_app_type] => utility [patent_app_number] => 18/532211 [patent_app_country] => US [patent_app_date] => 2023-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 17 [patent_figures_cnt] => 27 [patent_no_of_words] => 19637 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532211 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/532211
Polar encoding method and apparatus and polar decoding method and apparatus Dec 6, 2023 Issued
Array ( [id] => 20045683 [patent_doc_number] => 20250183905 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-06-05 [patent_title] => MULTI-STAGE PIPELINE SAR ANALOG-TO-DIGITAL CONVERTER (ADC) [patent_app_type] => utility [patent_app_number] => 18/530066 [patent_app_country] => US [patent_app_date] => 2023-12-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4781 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 227 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530066 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/530066
MULTI-STAGE PIPELINE SAR ANALOG-TO-DIGITAL CONVERTER (ADC) Dec 4, 2023 Abandoned
Array ( [id] => 19253797 [patent_doc_number] => 20240204794 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-06-20 [patent_title] => ANALOG-TO-DIGITAL CONVERTER, ADC, A METHOD FOR CONTROLLING SAID ADC, AND A METHOD FOR CONTROLLING A DIGITAL-ANALOG-CONVERTER FOR SAID ADC [patent_app_type] => utility [patent_app_number] => 18/527683 [patent_app_country] => US [patent_app_date] => 2023-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5226 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 265 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18527683 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/527683
ANALOG-TO-DIGITAL CONVERTER, ADC, A METHOD FOR CONTROLLING SAID ADC, AND A METHOD FOR CONTROLLING A DIGITAL-ANALOG-CONVERTER FOR SAID ADC Dec 3, 2023 Pending
Array ( [id] => 19605684 [patent_doc_number] => 20240396564 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-11-28 [patent_title] => HIGH-ORDER NOISE-SHAPING SUCCESSIVE APPROXIMATION REGISTER (SAR) ANALOG-TO-DIGITAL CONVERTER AND METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 18/524957 [patent_app_country] => US [patent_app_date] => 2023-11-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6874 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -9 [patent_words_short_claim] => 121 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18524957 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/524957
High-order noise-shaping successive approximation register (SAR) analog-to-digital converter and method thereof Nov 29, 2023 Issued
Array ( [id] => 19055723 [patent_doc_number] => 20240097692 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-21 [patent_title] => SUCCESSIVE APPROXIMATION REGISTER ANALOG TO DIGITAL CONVERTER WITH REDUCED DATA PATH LATENCY [patent_app_type] => utility [patent_app_number] => 18/522698 [patent_app_country] => US [patent_app_date] => 2023-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11321 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18522698 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/522698
Successive approximation register analog to digital converter with reduced data path latency Nov 28, 2023 Issued
Array ( [id] => 19023868 [patent_doc_number] => 20240080039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-07 [patent_title] => Guaranteed Data Compression [patent_app_type] => utility [patent_app_number] => 18/389198 [patent_app_country] => US [patent_app_date] => 2023-11-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 28428 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 38 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18389198 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/389198
Guaranteed data compression Nov 12, 2023 Issued
Array ( [id] => 20581786 [patent_doc_number] => 12574044 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-03-10 [patent_title] => System and method for multi-dimensional digital- to-analog converter (DAC) [patent_app_type] => utility [patent_app_number] => 18/498125 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 5638 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498125 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498125
System and method for multi-dimensional digital- to-analog converter (DAC) Oct 30, 2023 Issued
Array ( [id] => 20003238 [patent_doc_number] => 20250141460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-01 [patent_title] => Voltage-to-Delay Converter [patent_app_type] => utility [patent_app_number] => 18/498358 [patent_app_country] => US [patent_app_date] => 2023-10-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5666 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 141 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18498358 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/498358
Voltage-to-delay converter Oct 30, 2023 Issued
Array ( [id] => 20268061 [patent_doc_number] => 12439067 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Lossless compression for multisample render targets alongside fragment compression [patent_app_type] => utility [patent_app_number] => 18/492520 [patent_app_country] => US [patent_app_date] => 2023-10-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 37 [patent_figures_cnt] => 37 [patent_no_of_words] => 24161 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 113 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18492520 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/492520
Lossless compression for multisample render targets alongside fragment compression Oct 22, 2023 Issued
Array ( [id] => 20495654 [patent_doc_number] => 12537536 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-01-27 [patent_title] => USB-C to Coax RF (MOCA) converter for data and power transfer [patent_app_type] => utility [patent_app_number] => 18/490337 [patent_app_country] => US [patent_app_date] => 2023-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 0 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18490337 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/490337
USB-C to Coax RF (MOCA) converter for data and power transfer Oct 18, 2023 Issued
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