
Albert Kang Wong
Examiner (ID: 14906, Phone: (571)272-3057 , Office: P/3649 )
| Most Active Art Unit | 2612 |
| Art Unit(s) | 2612, 3649, 2689, 2617, 2735, 2635, 2683, 2685 |
| Total Applications | 1756 |
| Issued Applications | 1254 |
| Pending Applications | 128 |
| Abandoned Applications | 379 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19460588
[patent_doc_number] => 12101107
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-24
[patent_title] => Signaling of coding tree unit block partitioning in neural network model compression
[patent_app_type] => utility
[patent_app_number] => 17/943439
[patent_app_country] => US
[patent_app_date] => 2022-09-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 20
[patent_no_of_words] => 16080
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 76
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17943439
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/943439 | Signaling of coding tree unit block partitioning in neural network model compression | Sep 12, 2022 | Issued |
Array
(
[id] => 19008744
[patent_doc_number] => 20240072815
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => DIGITAL-TO-ANALOG CONVERTER WITH LOCALIZED FREQUENCY MULTIPLICATION CIRCUITS
[patent_app_type] => utility
[patent_app_number] => 17/899446
[patent_app_country] => US
[patent_app_date] => 2022-08-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10386
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 92
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17899446
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/899446 | Digital-to-analog converter with localized frequency multiplication circuits | Aug 29, 2022 | Issued |
Array
(
[id] => 19005102
[patent_doc_number] => 20240069173
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-02-29
[patent_title] => OUTPUT STAGE CIRCUIT, DAC, TOF SYSTEM AND CURRENT DRIVING METHOD
[patent_app_type] => utility
[patent_app_number] => 17/898432
[patent_app_country] => US
[patent_app_date] => 2022-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4842
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17898432
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/898432 | Output stage circuit, DAC, TOF system and current driving method | Aug 28, 2022 | Issued |
Array
(
[id] => 19385177
[patent_doc_number] => 20240275047
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => MULTIBAND ANTENNA
[patent_app_type] => utility
[patent_app_number] => 18/688635
[patent_app_country] => US
[patent_app_date] => 2022-08-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4250
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 239
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18688635
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/688635 | Multiband antenna | Aug 28, 2022 | Issued |
Array
(
[id] => 19616546
[patent_doc_number] => 20240402226
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => DEVICE FOR RECEIVING AN INPUT CURRENT AND OPERATING METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 18/690839
[patent_app_country] => US
[patent_app_date] => 2022-08-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 13089
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18690839
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/690839 | DEVICE FOR RECEIVING AN INPUT CURRENT AND OPERATING METHOD THEREFOR | Aug 23, 2022 | Pending |
Array
(
[id] => 19494815
[patent_doc_number] => 12113542
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-08
[patent_title] => Calibration detector with two offset compensation loops
[patent_app_type] => utility
[patent_app_number] => 17/892001
[patent_app_country] => US
[patent_app_date] => 2022-08-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 16169
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 89
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17892001
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/892001 | Calibration detector with two offset compensation loops | Aug 18, 2022 | Issued |
Array
(
[id] => 19314982
[patent_doc_number] => 12040813
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Integrating analog-to-digital converter and semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/886033
[patent_app_country] => US
[patent_app_date] => 2022-08-11
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 15
[patent_figures_cnt] => 15
[patent_no_of_words] => 13215
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 126
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17886033
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/886033 | Integrating analog-to-digital converter and semiconductor device | Aug 10, 2022 | Issued |
Array
(
[id] => 18025205
[patent_doc_number] => 20220376704
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-24
[patent_title] => EFFICIENT DATA ENCODING
[patent_app_type] => utility
[patent_app_number] => 17/882464
[patent_app_country] => US
[patent_app_date] => 2022-08-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9449
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -11
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17882464
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/882464 | EFFICIENT DATA ENCODING | Aug 4, 2022 | Abandoned |
Array
(
[id] => 19244968
[patent_doc_number] => 12015426
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-06-18
[patent_title] => System and method of reducing delta-sigma modulator error using force-and-correction
[patent_app_type] => utility
[patent_app_number] => 17/880868
[patent_app_country] => US
[patent_app_date] => 2022-08-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 11
[patent_no_of_words] => 6173
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880868
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/880868 | System and method of reducing delta-sigma modulator error using force-and-correction | Aug 3, 2022 | Issued |
Array
(
[id] => 19314990
[patent_doc_number] => 12040821
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-07-16
[patent_title] => Weight processing for a neural network
[patent_app_type] => utility
[patent_app_number] => 17/880285
[patent_app_country] => US
[patent_app_date] => 2022-08-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 8251
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 123
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17880285
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/880285 | Weight processing for a neural network | Aug 2, 2022 | Issued |
Array
(
[id] => 19524619
[patent_doc_number] => 12126363
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-10-22
[patent_title] => Error cancellation delta-sigma DAC with an inverting amplifier-based filter
[patent_app_type] => utility
[patent_app_number] => 17/876679
[patent_app_country] => US
[patent_app_date] => 2022-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 9
[patent_no_of_words] => 6027
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 112
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876679
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/876679 | Error cancellation delta-sigma DAC with an inverting amplifier-based filter | Jul 28, 2022 | Issued |
Array
(
[id] => 18009573
[patent_doc_number] => 20220368340
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => ANALOG TO DIGITAL CONVERTER WITH VCO-BASED AND PIPELINED QUANTIZERS
[patent_app_type] => utility
[patent_app_number] => 17/876761
[patent_app_country] => US
[patent_app_date] => 2022-07-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3860
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876761
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/876761 | Analog to digital converter with VCO-based and pipelined quantizers | Jul 28, 2022 | Issued |
Array
(
[id] => 19154242
[patent_doc_number] => 11979167
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-05-07
[patent_title] => Low power and high speed data weighted averaging (DWA) to binary converter circuit
[patent_app_type] => utility
[patent_app_number] => 17/876263
[patent_app_country] => US
[patent_app_date] => 2022-07-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 11
[patent_no_of_words] => 8684
[patent_no_of_claims] => 28
[patent_no_of_ind_claims] => 4
[patent_words_short_claim] => 56
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17876263
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/876263 | Low power and high speed data weighted averaging (DWA) to binary converter circuit | Jul 27, 2022 | Issued |
Array
(
[id] => 18147725
[patent_doc_number] => 20230021582
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-26
[patent_title] => SYSTEM AND METHOD FOR DATA COMPACTION AND SECURITY WITH EXTENDED FUNCTIONALITY
[patent_app_type] => utility
[patent_app_number] => 17/875201
[patent_app_country] => US
[patent_app_date] => 2022-07-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 23101
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 155
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17875201
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/875201 | System and method for data compaction and security with extended functionality | Jul 26, 2022 | Issued |
Array
(
[id] => 18177632
[patent_doc_number] => 20230038361
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-02-09
[patent_title] => SIGMA-DELTA ANALOG-TO-DIGITAL CONVERTER
[patent_app_type] => utility
[patent_app_number] => 17/814978
[patent_app_country] => US
[patent_app_date] => 2022-07-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7265
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 242
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17814978
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/814978 | Sigma-delta analog-to-digital converter | Jul 25, 2022 | Issued |
Array
(
[id] => 18009569
[patent_doc_number] => 20220368336
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-11-17
[patent_title] => DATA CONVERSION
[patent_app_type] => utility
[patent_app_number] => 17/869344
[patent_app_country] => US
[patent_app_date] => 2022-07-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7133
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17869344
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/869344 | Data conversion | Jul 19, 2022 | Issued |
Array
(
[id] => 18114405
[patent_doc_number] => 20230007285
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-01-05
[patent_title] => Lossless Compression for Multisample Render Targets Alongside Fragment Compression
[patent_app_type] => utility
[patent_app_number] => 17/862696
[patent_app_country] => US
[patent_app_date] => 2022-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 29054
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 113
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17862696
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/862696 | Lossless compression for multisample render targets alongside fragment compression | Jul 11, 2022 | Issued |
Array
(
[id] => 19415389
[patent_doc_number] => 12081233
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-03
[patent_title] => Common-mode current removal scheme for digital-to-analog converters
[patent_app_type] => utility
[patent_app_number] => 17/810100
[patent_app_country] => US
[patent_app_date] => 2022-06-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 9448
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 105
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17810100
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/810100 | Common-mode current removal scheme for digital-to-analog converters | Jun 29, 2022 | Issued |
Array
(
[id] => 19428878
[patent_doc_number] => 12088319
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-09-10
[patent_title] => Multipath D/A converter
[patent_app_type] => utility
[patent_app_number] => 17/853399
[patent_app_country] => US
[patent_app_date] => 2022-06-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 2
[patent_figures_cnt] => 2
[patent_no_of_words] => 1403
[patent_no_of_claims] => 11
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 104
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17853399
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/853399 | Multipath D/A converter | Jun 28, 2022 | Issued |
Array
(
[id] => 19639909
[patent_doc_number] => 12170527
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-12-17
[patent_title] => High linearity resistive digital-to-analog converters with dynamic control for temperature and voltage invariant on-resistance of switches
[patent_app_type] => utility
[patent_app_number] => 17/852312
[patent_app_country] => US
[patent_app_date] => 2022-06-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 9
[patent_figures_cnt] => 9
[patent_no_of_words] => 4132
[patent_no_of_claims] => 7
[patent_no_of_ind_claims] => 5
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17852312
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/852312 | High linearity resistive digital-to-analog converters with dynamic control for temperature and voltage invariant on-resistance of switches | Jun 27, 2022 | Issued |