Search

Albert Kir

Examiner (ID: 4004, Phone: (571)272-6245 , Office: P/2489 )

Most Active Art Unit
2485
Art Unit(s)
2489, 2485
Total Applications
564
Issued Applications
336
Pending Applications
83
Abandoned Applications
163

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19007710 [patent_doc_number] => 20240071781 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-29 [patent_title] => METHOD FOR SEALING ELECTRONIC COMPONENT MOUNTING SUBSTRATE, AND HEAT-CURABLE SHEET [patent_app_type] => utility [patent_app_number] => 18/263552 [patent_app_country] => US [patent_app_date] => 2022-01-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9523 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 187 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18263552 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/263552
METHOD FOR SEALING ELECTRONIC COMPONENT MOUNTING SUBSTRATE, AND HEAT-CURABLE SHEET Jan 26, 2022 Pending
Array ( [id] => 18112861 [patent_doc_number] => 20230005741 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-05 [patent_title] => THIN-FILM DEPOSITION METHOD AND SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/648448 [patent_app_country] => US [patent_app_date] => 2022-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3847 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17648448 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/648448
THIN-FILM DEPOSITION METHOD AND SEMICONDUCTOR DEVICE Jan 19, 2022 Pending
Array ( [id] => 17752889 [patent_doc_number] => 20220231094 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-21 [patent_title] => Transparent OLED Device [patent_app_type] => utility [patent_app_number] => 17/579084 [patent_app_country] => US [patent_app_date] => 2022-01-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10456 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17579084 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/579084
Transparent OLED Device Jan 18, 2022 Pending
Array ( [id] => 18148498 [patent_doc_number] => 20230022355 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-26 [patent_title] => SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/647741 [patent_app_country] => US [patent_app_date] => 2022-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3323 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17647741 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/647741
SEMICONDUCTOR STRUCTURE AND MANUFACTURING METHOD THEREOF Jan 11, 2022 Abandoned
Array ( [id] => 18168606 [patent_doc_number] => 20230035216 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-02-02 [patent_title] => THREE-DIMENSIONAL ARTIFICIAL NEURAL NETWORK ACCELERATOR AND METHODS OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 17/569869 [patent_app_country] => US [patent_app_date] => 2022-01-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8594 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 53 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17569869 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/569869
THREE-DIMENSIONAL ARTIFICIAL NEURAL NETWORK ACCELERATOR AND METHODS OF FORMING THE SAME Jan 5, 2022 Pending
Array ( [id] => 18020384 [patent_doc_number] => 20220371883 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-24 [patent_title] => METHOD FOR PREPARING A MEMS MICRO MIRROR WITH ELCTRODES ON BOTH SIDES [patent_app_type] => utility [patent_app_number] => 17/560164 [patent_app_country] => US [patent_app_date] => 2021-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8150 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -6 [patent_words_short_claim] => 401 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17560164 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/560164
Method for preparing a MEMS micro mirror with electrodes on both sides Dec 21, 2021 Issued
Array ( [id] => 19926201 [patent_doc_number] => 12300494 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-13 [patent_title] => Ion implantation process to form punch through stopper [patent_app_type] => utility [patent_app_number] => 17/548002 [patent_app_country] => US [patent_app_date] => 2021-12-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 11 [patent_no_of_words] => 0 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 125 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17548002 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/548002
Ion implantation process to form punch through stopper Dec 9, 2021 Issued
Array ( [id] => 18366215 [patent_doc_number] => 20230147806 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-05-11 [patent_title] => SEMICONDUCTOR STRUCTURE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/545996 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545996 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545996
Semiconductor structure including insulating vacancy for improving operation performance and method of fabricating the same Dec 7, 2021 Issued
Array ( [id] => 19213681 [patent_doc_number] => 12002753 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-06-04 [patent_title] => Electronic fuse with passive two-terminal phase change material and method of fabrication [patent_app_type] => utility [patent_app_number] => 17/545260 [patent_app_country] => US [patent_app_date] => 2021-12-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 25 [patent_no_of_words] => 5292 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17545260 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/545260
Electronic fuse with passive two-terminal phase change material and method of fabrication Dec 7, 2021 Issued
Array ( [id] => 18882823 [patent_doc_number] => 20240006192 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/255367 [patent_app_country] => US [patent_app_date] => 2021-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8653 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 188 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18255367 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/255367
METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Dec 2, 2021 Pending
Array ( [id] => 17645281 [patent_doc_number] => 20220173020 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-06-02 [patent_title] => AN ELECTRICAL CONNECTION STRUCTURE AND AN ELECTRONIC DEVICE INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/539255 [patent_app_country] => US [patent_app_date] => 2021-12-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3432 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 65 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17539255 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/539255
AN ELECTRICAL CONNECTION STRUCTURE AND AN ELECTRONIC DEVICE INCLUDING THE SAME Nov 30, 2021 Pending
Array ( [id] => 17477613 [patent_doc_number] => 20220085117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-03-17 [patent_title] => LIGHT EMITTING DISPLAY DEVICE INCLUDING CONDUCTIVITY IMPROVEMENT LAYER [patent_app_type] => utility [patent_app_number] => 17/536964 [patent_app_country] => US [patent_app_date] => 2021-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15735 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 144 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17536964 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/536964
Light emitting display device including conductivity improvement layer Nov 28, 2021 Issued
Array ( [id] => 19199180 [patent_doc_number] => 11996429 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-05-28 [patent_title] => CMOS image sensor structure with microstructures on backside surface of semiconductor layer [patent_app_type] => utility [patent_app_number] => 17/525926 [patent_app_country] => US [patent_app_date] => 2021-11-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 15 [patent_no_of_words] => 6143 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17525926 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/525926
CMOS image sensor structure with microstructures on backside surface of semiconductor layer Nov 13, 2021 Issued
Array ( [id] => 17402911 [patent_doc_number] => 20220045002 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-02-10 [patent_title] => METHOD FOR PREPARING VERTICAL ELECTRICAL FUSE DEVICE [patent_app_type] => utility [patent_app_number] => 17/508770 [patent_app_country] => US [patent_app_date] => 2021-10-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8798 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 94 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17508770 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/508770
Method for preparing vertical electrical fuse device Oct 21, 2021 Issued
Array ( [id] => 17615719 [patent_doc_number] => 20220157999 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-05-19 [patent_title] => SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/507250 [patent_app_country] => US [patent_app_date] => 2021-10-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 13034 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17507250 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/507250
SEMICONDUCTOR DEVICE Oct 20, 2021 Abandoned
Array ( [id] => 17737998 [patent_doc_number] => 20220223460 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-07-14 [patent_title] => TRANSFERRING APPARATUS AND METHOD FOR TRANSFERRING ELECTRONIC COMPONENT [patent_app_type] => utility [patent_app_number] => 17/505633 [patent_app_country] => US [patent_app_date] => 2021-10-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3741 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -20 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17505633 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/505633
TRANSFERRING APPARATUS AND METHOD FOR TRANSFERRING ELECTRONIC COMPONENT Oct 19, 2021 Abandoned
Array ( [id] => 17780087 [patent_doc_number] => 20220246437 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-04 [patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/504636 [patent_app_country] => US [patent_app_date] => 2021-10-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17504636 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/504636
Method for forming semiconductor structure Oct 18, 2021 Issued
Array ( [id] => 19277398 [patent_doc_number] => 12027531 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-02 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 17/501014 [patent_app_country] => US [patent_app_date] => 2021-10-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5022 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 262 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17501014 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/501014
Display device Oct 13, 2021 Issued
Array ( [id] => 18312700 [patent_doc_number] => 20230116600 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-04-13 [patent_title] => BENCHMARK DEVICE ON A SEMICONDUCTOR WAFER WITH FUSE ELEMENT [patent_app_type] => utility [patent_app_number] => 17/499911 [patent_app_country] => US [patent_app_date] => 2021-10-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5730 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17499911 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/499911
Benchmark device on a semiconductor wafer with fuse element Oct 12, 2021 Issued
Array ( [id] => 18264753 [patent_doc_number] => 20230085995 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-23 [patent_title] => SEMICONDUCTOR DEVICE IDENTIFICATION USING PREFORMED RESISTIVE MEMORY [patent_app_type] => utility [patent_app_number] => 17/481842 [patent_app_country] => US [patent_app_date] => 2021-09-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4648 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 46 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17481842 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/481842
Semiconductor device identification using preformed resistive memory Sep 21, 2021 Issued
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