Search

Alecia Diane English

Examiner (ID: 3829, Phone: (571)270-1595 , Office: P/2625 )

Most Active Art Unit
2625
Art Unit(s)
2629, 2775, 2699, 2675, 2625
Total Applications
715
Issued Applications
341
Pending Applications
80
Abandoned Applications
303

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 3552716 [patent_doc_number] => 05481696 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'Communication apparatus operative to switch dynamically between different communication configurations by indexing each set of configurables with a unique memory address' [patent_app_type] => 1 [patent_app_number] => 8/203890 [patent_app_country] => US [patent_app_date] => 1994-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 4848 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 241 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481696.pdf [firstpage_image] =>[orig_patent_app_number] => 203890 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/203890
Communication apparatus operative to switch dynamically between different communication configurations by indexing each set of configurables with a unique memory address Feb 28, 1994 Issued
Array ( [id] => 3505460 [patent_doc_number] => 05537560 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-07-16 [patent_title] => 'Method and apparatus for conditionally generating a microinstruction that selects one of two values based upon control states of a microprocessor' [patent_app_type] => 1 [patent_app_number] => 8/203783 [patent_app_country] => US [patent_app_date] => 1994-03-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 3 [patent_no_of_words] => 7391 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/537/05537560.pdf [firstpage_image] =>[orig_patent_app_number] => 203783 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/203783
Method and apparatus for conditionally generating a microinstruction that selects one of two values based upon control states of a microprocessor Feb 28, 1994 Issued
08/203239 SEGMENTED COMMUNICATIONS ADAPTER WITH PACKET TRANSFER INTERFACE Feb 27, 1994 Abandoned
Array ( [id] => 3524124 [patent_doc_number] => 05564041 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-10-08 [patent_title] => 'Microprocessor for inserting a bus cycle in an instruction set to output an internal information for an emulation' [patent_app_type] => 1 [patent_app_number] => 8/201488 [patent_app_country] => US [patent_app_date] => 1994-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 16 [patent_figures_cnt] => 18 [patent_no_of_words] => 9233 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/564/05564041.pdf [firstpage_image] =>[orig_patent_app_number] => 201488 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/201488
Microprocessor for inserting a bus cycle in an instruction set to output an internal information for an emulation Feb 23, 1994 Issued
Array ( [id] => 3518677 [patent_doc_number] => 05515522 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-05-07 [patent_title] => 'Coherence index generation for use by an input/output adapter located outside of the processor to detect whether the updated version of data resides within the cache' [patent_app_type] => 1 [patent_app_number] => 8/201433 [patent_app_country] => US [patent_app_date] => 1994-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 3827 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/515/05515522.pdf [firstpage_image] =>[orig_patent_app_number] => 201433 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/201433
Coherence index generation for use by an input/output adapter located outside of the processor to detect whether the updated version of data resides within the cache Feb 23, 1994 Issued
Array ( [id] => 3533782 [patent_doc_number] => 05530933 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-06-25 [patent_title] => 'Multiprocessor system for maintaining cache coherency by checking the coherency in the order of the transactions being issued on the bus' [patent_app_type] => 1 [patent_app_number] => 8/201463 [patent_app_country] => US [patent_app_date] => 1994-02-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 2 [patent_no_of_words] => 8195 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 223 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/530/05530933.pdf [firstpage_image] =>[orig_patent_app_number] => 201463 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/201463
Multiprocessor system for maintaining cache coherency by checking the coherency in the order of the transactions being issued on the bus Feb 23, 1994 Issued
Array ( [id] => 3635731 [patent_doc_number] => 05594867 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1997-01-14 [patent_title] => 'Data communication apparatus which transmits in accordance with a reception time zone or a terminal from which data has been received' [patent_app_type] => 1 [patent_app_number] => 8/190681 [patent_app_country] => US [patent_app_date] => 1994-01-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 3858 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 98 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/594/05594867.pdf [firstpage_image] =>[orig_patent_app_number] => 190681 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/190681
Data communication apparatus which transmits in accordance with a reception time zone or a terminal from which data has been received Jan 20, 1994 Issued
08/176785 METHOD AND APPARATUS FOR PREDICTING, EXECUTING, AND RETIRING BRANCH INSTRUCTIONS IN A PIPELINED SUPERSCALAR PROCESSOR Jan 2, 1994 Abandoned
Array ( [id] => 3553462 [patent_doc_number] => 05481745 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-01-02 [patent_title] => 'High speed divider for performing hexadecimal division having control circuit for generating different division cycle signals to control circuit in performing specific functions' [patent_app_type] => 1 [patent_app_number] => 8/172337 [patent_app_country] => US [patent_app_date] => 1993-12-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 19 [patent_figures_cnt] => 19 [patent_no_of_words] => 13971 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 581 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/481/05481745.pdf [firstpage_image] =>[orig_patent_app_number] => 172337 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/172337
High speed divider for performing hexadecimal division having control circuit for generating different division cycle signals to control circuit in performing specific functions Dec 22, 1993 Issued
Array ( [id] => 3438952 [patent_doc_number] => 05455915 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-10-03 [patent_title] => 'Computer system with bridge circuitry having input/output multiplexers and third direct unidirectional path for data transfer between buses operating at different rates' [patent_app_type] => 1 [patent_app_number] => 8/168765 [patent_app_country] => US [patent_app_date] => 1993-12-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 3923 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 76 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/455/05455915.pdf [firstpage_image] =>[orig_patent_app_number] => 168765 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/168765
Computer system with bridge circuitry having input/output multiplexers and third direct unidirectional path for data transfer between buses operating at different rates Dec 15, 1993 Issued
Array ( [id] => 3070498 [patent_doc_number] => 05339412 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1994-08-16 [patent_title] => 'Electronic filing system using a mark on each page of the document for building a database with respect to plurality of multi-page documents' [patent_app_type] => 1 [patent_app_number] => 8/164883 [patent_app_country] => US [patent_app_date] => 1993-12-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 5 [patent_no_of_words] => 2962 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/339/05339412.pdf [firstpage_image] =>[orig_patent_app_number] => 164883 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/164883
Electronic filing system using a mark on each page of the document for building a database with respect to plurality of multi-page documents Dec 12, 1993 Issued
Array ( [id] => 3466761 [patent_doc_number] => 05452425 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-19 [patent_title] => 'Sequential constant generator system for indicating the last data word by using the end of loop bit having opposite digital state than other data words' [patent_app_type] => 1 [patent_app_number] => 8/163606 [patent_app_country] => US [patent_app_date] => 1993-12-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 48 [patent_figures_cnt] => 77 [patent_no_of_words] => 33467 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 503 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/452/05452425.pdf [firstpage_image] =>[orig_patent_app_number] => 163606 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/163606
Sequential constant generator system for indicating the last data word by using the end of loop bit having opposite digital state than other data words Dec 6, 1993 Issued
Array ( [id] => 3592832 [patent_doc_number] => 05499376 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-03-12 [patent_title] => 'High speed mask and logical combination operations for parallel processor units' [patent_app_type] => 1 [patent_app_number] => 8/163460 [patent_app_country] => US [patent_app_date] => 1993-12-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 3687 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/499/05499376.pdf [firstpage_image] =>[orig_patent_app_number] => 163460 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/163460
High speed mask and logical combination operations for parallel processor units Dec 5, 1993 Issued
Array ( [id] => 3132756 [patent_doc_number] => 05450556 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'VLIW processor which uses path information generated by a branch control unit to inhibit operations which are not on a correct path' [patent_app_type] => 1 [patent_app_number] => 8/142648 [patent_app_country] => US [patent_app_date] => 1993-10-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 7 [patent_no_of_words] => 7131 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450556.pdf [firstpage_image] =>[orig_patent_app_number] => 142648 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/142648
VLIW processor which uses path information generated by a branch control unit to inhibit operations which are not on a correct path Oct 24, 1993 Issued
Array ( [id] => 3537192 [patent_doc_number] => 05504874 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-04-02 [patent_title] => 'System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions' [patent_app_type] => 1 [patent_app_number] => 8/128080 [patent_app_country] => US [patent_app_date] => 1993-09-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 8 [patent_no_of_words] => 5444 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 210 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/504/05504874.pdf [firstpage_image] =>[orig_patent_app_number] => 128080 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/128080
System and method of implementing read resources to maintain cache coherency in a multiprocessor environment permitting split transactions Sep 28, 1993 Issued
08/123657 MANAGEMENT AGENT SYSTEM FOR THE SUPPORT OF MULTIPLE NETWORK MANAGERS, AND A METHOD FOR OPERATING SUCH A SYSTEM Sep 19, 1993 Abandoned
Array ( [id] => 3575682 [patent_doc_number] => 05551655 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1996-09-03 [patent_title] => 'Portable tripod' [patent_app_type] => 1 [patent_app_number] => 8/120276 [patent_app_country] => US [patent_app_date] => 1993-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 5 [patent_no_of_words] => 1568 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/551/05551655.pdf [firstpage_image] =>[orig_patent_app_number] => 120276 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/120276
Portable tripod Sep 9, 1993 Issued
Array ( [id] => 3133826 [patent_doc_number] => 05450608 [patent_country] => US [patent_kind] => NA [patent_issue_date] => 1995-09-12 [patent_title] => 'Programmable logic having selectable output states for initialization and resets asynchronously using control bit associated with each product term' [patent_app_type] => 1 [patent_app_number] => 8/111663 [patent_app_country] => US [patent_app_date] => 1993-08-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5399 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 6 [patent_words_short_claim] => 156 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] => patents/05/450/05450608.pdf [firstpage_image] =>[orig_patent_app_number] => 111663 [rel_patent_id] =>[rel_patent_doc_number] =>)
08/111663
Programmable logic having selectable output states for initialization and resets asynchronously using control bit associated with each product term Aug 24, 1993 Issued
08/110325 PROCESSOR WITH IN-SYSTEM EMULATION CIRCUITRY AND METHOD Aug 19, 1993 Abandoned
08/108546 MAPPING CALCULATION UNITS BY DIVIDING A CALCULATION MODEL WHICH CAN BE CALCULATED IN PARALLEL ON AN APPLICATION PROGRAM Aug 18, 1993 Abandoned
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