| Application number | Title of the application | Filing Date | Status |
|---|
| 07/610573 | AN ELECTRONIC FILING SYSTEM USING A MARK ON EACH PAGE OF THE DOCUMENT FOR BUILDING A DATABASE WITH RESPECT TO PLURALITY OF MULTI-PAGE DOCUMENTS | Nov 7, 1990 | Abandoned |
Array
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[patent_doc_number] => 05717928
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1998-02-10
[patent_title] => 'System and a method for obtaining a mask programmable device using a logic description and a field programmable device implementing the logic description'
[patent_app_type] => 1
[patent_app_number] => 7/610479
[patent_app_country] => US
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| 07/609814 | PROCESSOR WITH IN-SYSTEM EMULATION CIRCUITRY AND METHOD | Nov 5, 1990 | Abandoned |
| 07/608914 | DATA-DRIVEN ARRAY PROCESSOR WITH HANDSHAKING PROTOCOL | Nov 4, 1990 | Abandoned |
Array
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[patent_doc_number] => 05341505
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[patent_kind] => NA
[patent_issue_date] => 1994-08-23
[patent_title] => 'System and method for accessing remotely located ZIP+4 zipcode database'
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Array
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[patent_kind] => NA
[patent_issue_date] => 1993-02-09
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[patent_app_type] => 1
[patent_app_number] => 7/603791
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Array
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[patent_doc_number] => 05280595
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[patent_kind] => NA
[patent_issue_date] => 1994-01-18
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[patent_app_type] => 1
[patent_app_number] => 7/593923
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[patent_kind] => NA
[patent_issue_date] => 1993-08-24
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[patent_app_type] => 1
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Array
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[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1994-06-21
[patent_title] => 'Memory access method and circuit in which access timing to a memory is divided into N periods to be accessed from N access request sources'
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Array
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[id] => 2947832
[patent_doc_number] => 05247625
[patent_country] => US
[patent_kind] => NA
[patent_issue_date] => 1993-09-21
[patent_title] => 'System for checking undefined addressing prescribed for each instruction of variable length using tag information to determine addressing field decoded in present or preceding cycle'
[patent_app_type] => 1
[patent_app_number] => 7/580791
[patent_app_country] => US
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| 07/578976 | EFFICIENT EXECUTION OF PROGRAMS WITH CONDITIONAL BRANCHES ON VERY LONG INSTRUCTION WORD MACHINES | Sep 4, 1990 | Abandoned |
| 07/576012 | INTEGRATED DIGITAL PROCESSING APPARATUS HAVING A SINGLE INTERNAL BIDIRECTIONAL DATA BUS | Aug 30, 1990 | Abandoned |
Array
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[id] => 3090044
[patent_doc_number] => 05297273
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[patent_kind] => NA
[patent_issue_date] => 1994-03-22
[patent_title] => 'System for optically splitting high-speed digital signals using cascading tree-type configuration wherein the number of successive level of cascading increase by a factor of two'
[patent_app_type] => 1
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Array
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[patent_kind] => NA
[patent_issue_date] => 1993-05-18
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Array
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[patent_kind] => NA
[patent_issue_date] => 1993-06-22
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Array
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Array
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Array
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[id] => 2924892
[patent_doc_number] => 05228137
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[patent_kind] => NA
[patent_issue_date] => 1993-07-13
[patent_title] => 'Method for controlling execution of host computer application programs through a second computer by establishing relevant parameters having variable time of occurrence and context'
[patent_app_type] => 1
[patent_app_number] => 7/549889
[patent_app_country] => US
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| 07/547127 | DATA COMMUNICATION APPARATUS FOR DESIGNATING A COMMUNICATION CONDITION AND A DESIGNATION STATION TO WHICH DATA IS TRANSMITTED | Jul 2, 1990 | Abandoned |
Array
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[id] => 2946620
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[patent_app_type] => 1
[patent_app_number] => 7/546411
[patent_app_country] => US
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