
Alex Torres-rivera
Examiner (ID: 13534, Phone: (571)272-5261 , Office: P/2838 )
| Most Active Art Unit | 2838 |
| Art Unit(s) | 2838 |
| Total Applications | 1009 |
| Issued Applications | 814 |
| Pending Applications | 112 |
| Abandoned Applications | 109 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20175921
[patent_doc_number] => 12394676
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-08-19
[patent_title] => Semiconductor package structure and method for manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 18/439743
[patent_app_country] => US
[patent_app_date] => 2024-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 21
[patent_no_of_words] => 8534
[patent_no_of_claims] => 10
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 101
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18439743
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/439743 | Semiconductor package structure and method for manufacturing the same | Feb 11, 2024 | Issued |
Array
(
[id] => 19161206
[patent_doc_number] => 20240153913
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => 3D STACKED PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/417789
[patent_app_country] => US
[patent_app_date] => 2024-01-19
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7889
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 189
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18417789
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/417789 | 3D STACKED PACKAGING STRUCTURE AND MANUFACTURING METHOD THEREOF | Jan 18, 2024 | Pending |
Array
(
[id] => 19712850
[patent_doc_number] => 20250022992
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-16
[patent_title] => DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/416179
[patent_app_country] => US
[patent_app_date] => 2024-01-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12924
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 100
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18416179
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/416179 | DISPLAY DEVICE AND MANUFACTURING METHOD THEREOF | Jan 17, 2024 | Pending |
Array
(
[id] => 20418376
[patent_doc_number] => 12501681
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-12-16
[patent_title] => Semiconductor device and method for fabricating the same
[patent_app_type] => utility
[patent_app_number] => 18/414469
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 3
[patent_figures_cnt] => 5
[patent_no_of_words] => 0
[patent_no_of_claims] => 5
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 51
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18414469
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/414469 | Semiconductor device and method for fabricating the same | Jan 16, 2024 | Issued |
Array
(
[id] => 19161281
[patent_doc_number] => 20240153988
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-09
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/415172
[patent_app_country] => US
[patent_app_date] => 2024-01-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 16647
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 191
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18415172
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/415172 | SEMICONDUCTOR DEVICE | Jan 16, 2024 | Pending |
Array
(
[id] => 19765900
[patent_doc_number] => 12224201
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-02-11
[patent_title] => Single crystalline silicon stack formation and bonding to a cmos wafer
[patent_app_type] => utility
[patent_app_number] => 18/403866
[patent_app_country] => US
[patent_app_date] => 2024-01-04
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 10
[patent_no_of_words] => 11497
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 83
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18403866
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/403866 | Single crystalline silicon stack formation and bonding to a cmos wafer | Jan 3, 2024 | Issued |
Array
(
[id] => 19146327
[patent_doc_number] => 20240145357
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-05-02
[patent_title] => ELECTRONIC ASSEMBLY
[patent_app_type] => utility
[patent_app_number] => 18/402649
[patent_app_country] => US
[patent_app_date] => 2024-01-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7301
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 45
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18402649
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/402649 | ELECTRONIC ASSEMBLY | Jan 1, 2024 | Pending |
Array
(
[id] => 19384704
[patent_doc_number] => 20240274574
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-08-15
[patent_title] => CHIP PACKAGING METHOD AND CHIP PACKAGE BASED ON PANEL FORM
[patent_app_type] => utility
[patent_app_number] => 18/396340
[patent_app_country] => US
[patent_app_date] => 2023-12-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2948
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 88
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18396340
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/396340 | CHIP PACKAGING METHOD AND CHIP PACKAGE BASED ON PANEL FORM | Dec 25, 2023 | Pending |
Array
(
[id] => 19108713
[patent_doc_number] => 11961827
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2024-04-16
[patent_title] => 3D semiconductor device and structure with metal layers
[patent_app_type] => utility
[patent_app_number] => 18/395546
[patent_app_country] => US
[patent_app_date] => 2023-12-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 61
[patent_figures_cnt] => 66
[patent_no_of_words] => 26960
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 132
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18395546
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/395546 | 3D semiconductor device and structure with metal layers | Dec 22, 2023 | Issued |
Array
(
[id] => 20058974
[patent_doc_number] => 20250197196
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-19
[patent_title] => PACKAGING FOR MICRO-ELECTROMECHANICAL SYSTEM (MEMS) DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/542156
[patent_app_country] => US
[patent_app_date] => 2023-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 10112
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 94
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542156
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542156 | PACKAGING FOR MICRO-ELECTROMECHANICAL SYSTEM (MEMS) DEVICE | Dec 14, 2023 | Pending |
Array
(
[id] => 19101100
[patent_doc_number] => 20240120328
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-04-11
[patent_title] => POWER MODULE PACKAGE FOR DIRECT COOLING MULTIPLE POWER MODULES
[patent_app_type] => utility
[patent_app_number] => 18/542230
[patent_app_country] => US
[patent_app_date] => 2023-12-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8893
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18542230
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/542230 | Power module package for direct cooling multiple power modules | Dec 14, 2023 | Issued |
Array
(
[id] => 20375355
[patent_doc_number] => 12482799
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Modules with integrated circuits and devices
[patent_app_type] => utility
[patent_app_number] => 18/532431
[patent_app_country] => US
[patent_app_date] => 2023-12-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 68
[patent_figures_cnt] => 107
[patent_no_of_words] => 26596
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 73
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18532431
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/532431 | Modules with integrated circuits and devices | Dec 6, 2023 | Issued |
Array
(
[id] => 20375289
[patent_doc_number] => 12482733
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Ground via clustering for crosstalk mitigation
[patent_app_type] => utility
[patent_app_number] => 18/530006
[patent_app_country] => US
[patent_app_date] => 2023-12-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 5
[patent_no_of_words] => 2403
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 98
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18530006
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/530006 | Ground via clustering for crosstalk mitigation | Dec 4, 2023 | Issued |
Array
(
[id] => 19823455
[patent_doc_number] => 20250081662
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-03-06
[patent_title] => HIGH POWER PHOTODIODE
[patent_app_type] => utility
[patent_app_number] => 18/525407
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4725
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 151
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525407
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525407 | HIGH POWER PHOTODIODE | Nov 29, 2023 | Pending |
Array
(
[id] => 20047287
[patent_doc_number] => 20250185509
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => METHODS FOR HEAT TREATING THERMOCOUPLES USING OHMIC HEATING AND RELATED SYSTEMS
[patent_app_type] => utility
[patent_app_number] => 18/525563
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 69
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525563
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525563 | METHODS FOR HEAT TREATING THERMOCOUPLES USING OHMIC HEATING AND RELATED SYSTEMS | Nov 29, 2023 | Pending |
Array
(
[id] => 19052472
[patent_doc_number] => 20240094441
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-03-21
[patent_title] => DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/525424
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6133
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 131
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525424
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525424 | DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME | Nov 29, 2023 | Pending |
Array
(
[id] => 20047042
[patent_doc_number] => 20250185264
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => NOVEL EMBEDDED NANO POROUS CAPS
[patent_app_type] => utility
[patent_app_number] => 18/525406
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5814
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 50
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525406
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525406 | NOVEL EMBEDDED NANO POROUS CAPS | Nov 29, 2023 | Pending |
Array
(
[id] => 20044922
[patent_doc_number] => 20250183144
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-06-05
[patent_title] => STACKED VERTICAL POWER MODULE
[patent_app_type] => utility
[patent_app_number] => 18/525409
[patent_app_country] => US
[patent_app_date] => 2023-11-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2291
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18525409
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/525409 | STACKED VERTICAL POWER MODULE | Nov 29, 2023 | Pending |
Array
(
[id] => 19912567
[patent_doc_number] => 12288786
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-29
[patent_title] => Shared well structure manufacturing method
[patent_app_type] => utility
[patent_app_number] => 18/518706
[patent_app_country] => US
[patent_app_date] => 2023-11-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 12
[patent_figures_cnt] => 13
[patent_no_of_words] => 11223
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 111
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518706
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/518706 | Shared well structure manufacturing method | Nov 23, 2023 | Issued |
Array
(
[id] => 19980305
[patent_doc_number] => 12347793
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-07-01
[patent_title] => Semiconductor package
[patent_app_type] => utility
[patent_app_number] => 18/518466
[patent_app_country] => US
[patent_app_date] => 2023-11-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 13
[patent_figures_cnt] => 13
[patent_no_of_words] => 4403
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 74
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18518466
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/518466 | Semiconductor package | Nov 22, 2023 | Issued |