Search

Alexander A. Singh

Examiner (ID: 17626, Phone: (571)270-0243 , Office: P/2834 )

Most Active Art Unit
2834
Art Unit(s)
2834
Total Applications
761
Issued Applications
552
Pending Applications
77
Abandoned Applications
155

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 10394444 [patent_doc_number] => 20150279451 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'EDGE-TRIGGERED PULSE LATCH' [patent_app_type] => utility [patent_app_number] => 14/227330 [patent_app_country] => US [patent_app_date] => 2014-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 5969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14227330 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/227330
EDGE-TRIGGERED PULSE LATCH Mar 26, 2014 Abandoned
Array ( [id] => 10394465 [patent_doc_number] => 20150279472 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-10-01 [patent_title] => 'TEMPERATURE COMPENSATION VIA MODULATION OF BIT LINE VOLTAGE DURING SENSING' [patent_app_type] => utility [patent_app_number] => 14/226354 [patent_app_country] => US [patent_app_date] => 2014-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4830 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14226354 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/226354
TEMPERATURE COMPENSATION VIA MODULATION OF BIT LINE VOLTAGE DURING SENSING Mar 25, 2014 Abandoned
Array ( [id] => 10617399 [patent_doc_number] => 09336846 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-05-10 [patent_title] => 'MRAM element with low writing temperature' [patent_app_type] => utility [patent_app_number] => 14/762264 [patent_app_country] => US [patent_app_date] => 2014-01-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 12 [patent_no_of_words] => 2843 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14762264 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/762264
MRAM element with low writing temperature Jan 15, 2014 Issued
Array ( [id] => 11687182 [patent_doc_number] => 09685233 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-06-20 [patent_title] => 'Programming multibit memory cells' [patent_app_type] => utility [patent_app_number] => 14/153934 [patent_app_country] => US [patent_app_date] => 2014-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 31 [patent_no_of_words] => 13021 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 378 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14153934 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/153934
Programming multibit memory cells Jan 12, 2014 Issued
Array ( [id] => 11194098 [patent_doc_number] => 09424916 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-08-23 [patent_title] => 'Semiconductor memory device and method for reading the same using a memory cell array including resistive memory cells to perform a single read command' [patent_app_type] => utility [patent_app_number] => 14/109109 [patent_app_country] => US [patent_app_date] => 2013-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 7684 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 181 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14109109 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/109109
Semiconductor memory device and method for reading the same using a memory cell array including resistive memory cells to perform a single read command Dec 16, 2013 Issued
Array ( [id] => 10570034 [patent_doc_number] => 09293210 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-03-22 [patent_title] => 'Multi-level cell memory device and operating method thereof' [patent_app_type] => utility [patent_app_number] => 14/096281 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 22 [patent_no_of_words] => 13412 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 193 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096281 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096281
Multi-level cell memory device and operating method thereof Dec 3, 2013 Issued
Array ( [id] => 10171863 [patent_doc_number] => 09202575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-12-01 [patent_title] => 'Nonvolatile semiconductor memory device' [patent_app_type] => utility [patent_app_number] => 14/096371 [patent_app_country] => US [patent_app_date] => 2013-12-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 15 [patent_no_of_words] => 9374 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 397 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14096371 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/096371
Nonvolatile semiconductor memory device Dec 3, 2013 Issued
Array ( [id] => 11221310 [patent_doc_number] => 09449653 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Memory chip package having optically and electrically connected chips, memory system having the same and driving method thereof' [patent_app_type] => utility [patent_app_number] => 14/094813 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4267 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094813 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094813
Memory chip package having optically and electrically connected chips, memory system having the same and driving method thereof Dec 2, 2013 Issued
Array ( [id] => 9516823 [patent_doc_number] => 20140153315 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-05 [patent_title] => 'SEMICONDUCTOR MEMORY APPARATUS, REFRESH METHOD AND SYSTEM' [patent_app_type] => utility [patent_app_number] => 14/095269 [patent_app_country] => US [patent_app_date] => 2013-12-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8951 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14095269 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/095269
SEMICONDUCTOR MEMORY APPARATUS, REFRESH METHOD AND SYSTEM Dec 2, 2013 Abandoned
Array ( [id] => 9544423 [patent_doc_number] => 20140169069 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-06-19 [patent_title] => 'Resistive Memory Device, System Including the Same and Method of Reading Data in the Same' [patent_app_type] => utility [patent_app_number] => 14/094021 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 23 [patent_figures_cnt] => 23 [patent_no_of_words] => 15913 [patent_no_of_claims] => 22 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094021 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094021
Resistive Memory Device, System Including the Same and Method of Reading Data in the Same Dec 1, 2013 Abandoned
Array ( [id] => 10270042 [patent_doc_number] => 20150155039 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-06-04 [patent_title] => 'Three-Dimensional Flash NOR Memory System With Configurable Pins' [patent_app_type] => utility [patent_app_number] => 14/094595 [patent_app_country] => US [patent_app_date] => 2013-12-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 9352 [patent_no_of_claims] => 73 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14094595 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/094595
Three-Dimensional Flash NOR Memory System With Configurable Pins Dec 1, 2013 Abandoned
Array ( [id] => 10537467 [patent_doc_number] => 09263100 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-16 [patent_title] => 'Bypass system and method that mimics clock to data memory read timing' [patent_app_type] => utility [patent_app_number] => 14/093123 [patent_app_country] => US [patent_app_date] => 2013-11-29 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 2 [patent_figures_cnt] => 3 [patent_no_of_words] => 3823 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 123 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14093123 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/093123
Bypass system and method that mimics clock to data memory read timing Nov 28, 2013 Issued
Array ( [id] => 9991189 [patent_doc_number] => 09036405 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2015-05-19 [patent_title] => 'Memory sense amplifier with multiple modes of operation' [patent_app_type] => utility [patent_app_number] => 14/092395 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 10 [patent_no_of_words] => 4307 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14092395 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/092395
Memory sense amplifier with multiple modes of operation Nov 26, 2013 Issued
Array ( [id] => 9863247 [patent_doc_number] => 20150043266 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-02-12 [patent_title] => 'ENHANCED TEMPERATURE RANGE FOR RESISTIVE TYPE MEMORY CIRCUITS WITH PRE-HEAT OPERATION' [patent_app_type] => utility [patent_app_number] => 14/092867 [patent_app_country] => US [patent_app_date] => 2013-11-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 8017 [patent_no_of_claims] => 27 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14092867 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/092867
ENHANCED TEMPERATURE RANGE FOR RESISTIVE TYPE MEMORY CIRCUITS WITH PRE-HEAT OPERATION Nov 26, 2013 Abandoned
Array ( [id] => 11452987 [patent_doc_number] => 09576635 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-02-21 [patent_title] => 'Thermally-assisted magnetic writing device' [patent_app_type] => utility [patent_app_number] => 14/391570 [patent_app_country] => US [patent_app_date] => 2013-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 30 [patent_no_of_words] => 12663 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 175 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14391570 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/391570
Thermally-assisted magnetic writing device Apr 8, 2013 Issued
Array ( [id] => 10224860 [patent_doc_number] => 20150109853 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-04-23 [patent_title] => 'MAGNETORESISTANCE EFFECT ELEMENT AND MAGNETIC MEMORY' [patent_app_type] => utility [patent_app_number] => 14/390324 [patent_app_country] => US [patent_app_date] => 2013-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 16229 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 5 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14390324 [rel_patent_id] =>[rel_patent_doc_number] =>)
14/390324
Magnetoresistance effect element and magnetic memory Mar 24, 2013 Issued
Array ( [id] => 11549734 [patent_doc_number] => 09618575 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-04-11 [patent_title] => 'Semiconductor device having plural data input/output terminals configured for write test and read test operations' [patent_app_type] => utility [patent_app_number] => 13/828711 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 16 [patent_no_of_words] => 11014 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 235 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13828711 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/828711
Semiconductor device having plural data input/output terminals configured for write test and read test operations Mar 13, 2013 Issued
Array ( [id] => 10531024 [patent_doc_number] => 09257164 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-02-09 [patent_title] => 'Circuits and methods for DQS autogating' [patent_app_type] => utility [patent_app_number] => 13/829881 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 9 [patent_no_of_words] => 10501 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 178 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13829881 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/829881
Circuits and methods for DQS autogating Mar 13, 2013 Issued
Array ( [id] => 10053281 [patent_doc_number] => 09093161 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2015-07-28 [patent_title] => 'Dynamic programming of advanced nanometer flash memory' [patent_app_type] => utility [patent_app_number] => 13/830207 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 6 [patent_no_of_words] => 2419 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 112 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13830207 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/830207
Dynamic programming of advanced nanometer flash memory Mar 13, 2013 Issued
Array ( [id] => 9601894 [patent_doc_number] => 20140198576 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2014-07-17 [patent_title] => 'PROGRAMMING TECHNIQUE FOR REDUCING PROGRAM DISTURB IN STACKED MEMORY STRUCTURES' [patent_app_type] => utility [patent_app_number] => 13/827475 [patent_app_country] => US [patent_app_date] => 2013-03-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 15 [patent_no_of_words] => 11475 [patent_no_of_claims] => 24 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 13827475 [rel_patent_id] =>[rel_patent_doc_number] =>)
13/827475
PROGRAMMING TECHNIQUE FOR REDUCING PROGRAM DISTURB IN STACKED MEMORY STRUCTURES Mar 13, 2013 Abandoned
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