Search

Alexander Belousov

Examiner (ID: 10208, Phone: (571)272-3167 , Office: P/2894 )

Most Active Art Unit
2894
Art Unit(s)
2811, 2818, 2894
Total Applications
738
Issued Applications
539
Pending Applications
68
Abandoned Applications
142

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 16241550 [patent_doc_number] => 20200258784 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-08-13 [patent_title] => Wrap-Around Contact on FinFET [patent_app_type] => utility [patent_app_number] => 16/865049 [patent_app_country] => US [patent_app_date] => 2020-05-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9579 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 95 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16865049 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/865049
Wrap-around contact on FinFET Apr 30, 2020 Issued
Array ( [id] => 18048042 [patent_doc_number] => 11522000 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-12-06 [patent_title] => Semiconductor package structure and manufacturing method thereof [patent_app_type] => utility [patent_app_number] => 16/856011 [patent_app_country] => US [patent_app_date] => 2020-04-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 9 [patent_no_of_words] => 3290 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 135 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16856011 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/856011
Semiconductor package structure and manufacturing method thereof Apr 21, 2020 Issued
Array ( [id] => 18371945 [patent_doc_number] => 11652127 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-05-16 [patent_title] => Image sensor device and methods of forming the same [patent_app_type] => utility [patent_app_number] => 16/851643 [patent_app_country] => US [patent_app_date] => 2020-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 17 [patent_no_of_words] => 7020 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 128 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16851643 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/851643
Image sensor device and methods of forming the same Apr 16, 2020 Issued
Array ( [id] => 16180332 [patent_doc_number] => 20200227301 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => MOUNTING OF SEMICONDUCTOR-ON-DIAMOND WAFERS FOR DEVICE PROCESSING [patent_app_type] => utility [patent_app_number] => 16/830298 [patent_app_country] => US [patent_app_date] => 2020-03-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6600 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 138 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16830298 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/830298
Mounting of semiconductor-on-diamond wafers for device processing Mar 25, 2020 Issued
Array ( [id] => 18520838 [patent_doc_number] => 11710733 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-07-25 [patent_title] => Vertical power grid standard cell architecture [patent_app_type] => utility [patent_app_number] => 16/808336 [patent_app_country] => US [patent_app_date] => 2020-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 9 [patent_figures_cnt] => 14 [patent_no_of_words] => 6458 [patent_no_of_claims] => 12 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16808336 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/808336
Vertical power grid standard cell architecture Mar 2, 2020 Issued
Array ( [id] => 16177348 [patent_doc_number] => 20200224316 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-07-16 [patent_title] => HYDROPHOBIC COATINGS FOR METALS INCORPORATING ANODIC AND RARE-EARTH OXIDES AND METHODS OF APPLYING SAME [patent_app_type] => utility [patent_app_number] => 16/741644 [patent_app_country] => US [patent_app_date] => 2020-01-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6995 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 32 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16741644 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/741644
HYDROPHOBIC COATINGS FOR METALS INCORPORATING ANODIC AND RARE-EARTH OXIDES AND METHODS OF APPLYING SAME Jan 12, 2020 Abandoned
Array ( [id] => 15906191 [patent_doc_number] => 20200152616 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-14 [patent_title] => MANUFACTURING METHOD OF PACKAGE ON PACKAGE STRUCTURE [patent_app_type] => utility [patent_app_number] => 16/740463 [patent_app_country] => US [patent_app_date] => 2020-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6845 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 70 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16740463 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/740463
Manufacturing method of package on package structure Jan 11, 2020 Issued
Array ( [id] => 15841495 [patent_doc_number] => 20200136030 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-30 [patent_title] => Multiply Spin-Coated Ultra-Thick Hybrid Hard Mask for Sub 60nm MRAM Devices [patent_app_type] => utility [patent_app_number] => 16/728099 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2622 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728099 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728099
Multiply spin-coated ultra-thick hybrid hard mask for sub 60nm MRAM devices Dec 26, 2019 Issued
Array ( [id] => 15873843 [patent_doc_number] => 20200144325 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-05-07 [patent_title] => Back Side Illuminated Image Sensor with Reduced Sidewall-Induced Leakage [patent_app_type] => utility [patent_app_number] => 16/728018 [patent_app_country] => US [patent_app_date] => 2019-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4395 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 39 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16728018 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/728018
Back side illuminated image sensor with reduced sidewall-induced leakage Dec 26, 2019 Issued
Array ( [id] => 15807419 [patent_doc_number] => 20200126852 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => MULTIFUNCTION SINGLE VIA PATTERNING [patent_app_type] => utility [patent_app_number] => 16/720261 [patent_app_country] => US [patent_app_date] => 2019-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 82 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16720261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/720261
Multifunction single via patterning Dec 18, 2019 Issued
Array ( [id] => 15807417 [patent_doc_number] => 20200126851 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-23 [patent_title] => MULTIFUNCTION SINGLE VIA PATTERNING [patent_app_type] => utility [patent_app_number] => 16/719261 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5634 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 63 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16719261 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/719261
Multifunction single via patterning Dec 17, 2019 Issued
Array ( [id] => 17516948 [patent_doc_number] => 11296109 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-04-05 [patent_title] => Method for manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 16/718239 [patent_app_country] => US [patent_app_date] => 2019-12-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 9222 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16718239 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/718239
Method for manufacturing semiconductor device Dec 17, 2019 Issued
Array ( [id] => 16873649 [patent_doc_number] => 20210167116 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-06-03 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 16/976829 [patent_app_country] => US [patent_app_date] => 2019-12-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11446 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -12 [patent_words_short_claim] => 118 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16976829 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/976829
Semiconductor device and method of fabricating the same Dec 16, 2019 Issued
Array ( [id] => 17232200 [patent_doc_number] => 20210358757 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2021-11-18 [patent_title] => ETCHING ISOLATION FEATURES AND DENSE FEATURES WITHIN A SUBSTRATE [patent_app_type] => utility [patent_app_number] => 17/298931 [patent_app_country] => US [patent_app_date] => 2019-11-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 19368 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -26 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17298931 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/298931
Etching isolation features and dense features within a substrate Nov 21, 2019 Issued
Array ( [id] => 15718109 [patent_doc_number] => 20200105822 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-04-02 [patent_title] => PROCESS MODULE FOR INCREASING THE RESPONSE OF BACKSIDE ILLUMINATED PHOTOSENSITIVE IMAGERS AND ASSOCIATED METHODS [patent_app_type] => utility [patent_app_number] => 16/687346 [patent_app_country] => US [patent_app_date] => 2019-11-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14117 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -15 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16687346 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/687346
PROCESS MODULE FOR INCREASING THE RESPONSE OF BACKSIDE ILLUMINATED PHOTOSENSITIVE IMAGERS AND ASSOCIATED METHODS Nov 17, 2019 Abandoned
Array ( [id] => 15625425 [patent_doc_number] => 20200083117 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-03-12 [patent_title] => SINGLE METALLIZATION SCHEME FOR GATE, SOURCE, AND DRAIN CONTACT INTEGRATION [patent_app_type] => utility [patent_app_number] => 16/684616 [patent_app_country] => US [patent_app_date] => 2019-11-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6503 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 84 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16684616 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/684616
Single metallization scheme for gate, source, and drain contact integration Nov 14, 2019 Issued
Array ( [id] => 17500631 [patent_doc_number] => 11289341 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2022-03-29 [patent_title] => Pattern transfer technique and method of manufacturing the same [patent_app_type] => utility [patent_app_number] => 16/587335 [patent_app_country] => US [patent_app_date] => 2019-09-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 14 [patent_no_of_words] => 6029 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16587335 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/587335
Pattern transfer technique and method of manufacturing the same Sep 29, 2019 Issued
Array ( [id] => 15414911 [patent_doc_number] => 20200027778 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-01-23 [patent_title] => HIGH RESISTIVITY SILICON-ON-INSULATOR STRUCTURE AND METHOD OF MANUFACTURE THEREOF [patent_app_type] => utility [patent_app_number] => 16/582447 [patent_app_country] => US [patent_app_date] => 2019-09-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11698 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 299 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16582447 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/582447
High resistivity silicon-on-insulator structure and method of manufacture thereof Sep 24, 2019 Issued
Array ( [id] => 18329582 [patent_doc_number] => 11634812 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-04-25 [patent_title] => Solid source sublimator [patent_app_type] => utility [patent_app_number] => 16/539911 [patent_app_country] => US [patent_app_date] => 2019-08-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 15 [patent_figures_cnt] => 19 [patent_no_of_words] => 15856 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 131 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16539911 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/539911
Solid source sublimator Aug 12, 2019 Issued
Array ( [id] => 15123791 [patent_doc_number] => 20190348529 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-14 [patent_title] => FIELD EFFECT TRANSISTORS HAVING A FIN [patent_app_type] => utility [patent_app_number] => 16/519225 [patent_app_country] => US [patent_app_date] => 2019-07-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8976 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 101 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16519225 [rel_patent_id] =>[rel_patent_doc_number] =>)
16/519225
Field effect transistors having a fin Jul 22, 2019 Issued
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