
Alexander Eisen
Supervisory Patent Examiner (ID: 2632, Phone: (571)272-7687 , Office: P/2697 )
| Most Active Art Unit | 2674 |
| Art Unit(s) | 2697, 2622, 2629, 2617, 2674, 2774 |
| Total Applications | 443 |
| Issued Applications | 318 |
| Pending Applications | 25 |
| Abandoned Applications | 100 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 6021402
[patent_doc_number] => 20110049728
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2011-03-03
[patent_title] => 'METHOD TO PERFORM ELECTRICAL TESTING AND ASSEMBLY OF ELECTRONIC DEVICES'
[patent_app_type] => utility
[patent_app_number] => 12/869377
[patent_app_country] => US
[patent_app_date] => 2010-08-26
[patent_effective_date] => 0000-00-00
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[patent_figures_cnt] => 38
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[patent_current_assignee] =>[type] => publication
[pdf_file] => publications/A1/0049/20110049728.pdf
[firstpage_image] =>[orig_patent_app_number] => 12869377
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/869377 | Electronic devices with extended metallization layer on a passivation layer | Aug 25, 2010 | Issued |
Array
(
[id] => 9140818
[patent_doc_number] => 08581282
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[patent_kind] => B2
[patent_issue_date] => 2013-11-12
[patent_title] => 'Lighting emitting diode device with directivity and coherency and manufacturing method for providing light with directivity and coherency'
[patent_app_type] => utility
[patent_app_number] => 12/868961
[patent_app_country] => US
[patent_app_date] => 2010-08-26
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Array
(
[id] => 8653476
[patent_doc_number] => 08373226
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[patent_kind] => B2
[patent_issue_date] => 2013-02-12
[patent_title] => 'Semiconductor device including a Trench-Gate Fin-FET'
[patent_app_type] => utility
[patent_app_number] => 12/869214
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[patent_app_date] => 2010-08-26
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/869214 | Semiconductor device including a Trench-Gate Fin-FET | Aug 25, 2010 | Issued |
Array
(
[id] => 7762092
[patent_doc_number] => 08114730
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[patent_issue_date] => 2012-02-14
[patent_title] => 'Shared contact structure, semiconductor device and method of fabricating the semiconductor device'
[patent_app_type] => utility
[patent_app_number] => 12/805226
[patent_app_country] => US
[patent_app_date] => 2010-07-20
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[firstpage_image] =>[orig_patent_app_number] => 12805226
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/805226 | Shared contact structure, semiconductor device and method of fabricating the semiconductor device | Jul 19, 2010 | Issued |
Array
(
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[patent_doc_number] => 20100276808
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[patent_kind] => A1
[patent_issue_date] => 2010-11-04
[patent_title] => 'SURFACE MOUNTING ELECTRONIC COMPONENT AND MANUFACTURING METHOD THEREOF'
[patent_app_type] => utility
[patent_app_number] => 12/835491
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/835491 | Electronic component for surface mounting | Jul 12, 2010 | Issued |
Array
(
[id] => 7545336
[patent_doc_number] => 08053307
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[patent_issue_date] => 2011-11-08
[patent_title] => 'Method of fabricating semiconductor device with cell epitaxial layers partially overlap buried cell gate electrode'
[patent_app_type] => utility
[patent_app_number] => 12/662393
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/662393 | Method of fabricating semiconductor device with cell epitaxial layers partially overlap buried cell gate electrode | Apr 13, 2010 | Issued |
Array
(
[id] => 8200733
[patent_doc_number] => 08187962
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[patent_issue_date] => 2012-05-29
[patent_title] => 'Self aligned silicided contacts'
[patent_app_type] => utility
[patent_app_number] => 12/754294
[patent_app_country] => US
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[pdf_file] => patents/08/187/08187962.pdf
[firstpage_image] =>[orig_patent_app_number] => 12754294
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/754294 | Self aligned silicided contacts | Apr 4, 2010 | Issued |
Array
(
[id] => 6432535
[patent_doc_number] => 20100187589
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[patent_kind] => A1
[patent_issue_date] => 2010-07-29
[patent_title] => 'DEVICES AND METHODS FOR PREVENTING CAPACITOR LEAKAGE'
[patent_app_type] => utility
[patent_app_number] => 12/753594
[patent_app_country] => US
[patent_app_date] => 2010-04-02
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
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[pdf_file] => publications/A1/0187/20100187589.pdf
[firstpage_image] =>[orig_patent_app_number] => 12753594
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/753594 | Devices and methods for preventing capacitor leakage | Apr 1, 2010 | Issued |
Array
(
[id] => 6256332
[patent_doc_number] => 20100295173
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[patent_issue_date] => 2010-11-25
[patent_title] => 'Composite Underfill and Semiconductor Package'
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[firstpage_image] =>[orig_patent_app_number] => 12714209
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/714209 | Composite Underfill and Semiconductor Package | Feb 25, 2010 | Abandoned |
Array
(
[id] => 6411807
[patent_doc_number] => 20100149855
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[patent_kind] => A1
[patent_issue_date] => 2010-06-17
[patent_title] => 'INTEGRATED CIRCUITRY FOR SEMICONDUCTOR MEMORY'
[patent_app_type] => utility
[patent_app_number] => 12/713673
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[patent_app_date] => 2010-02-26
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[firstpage_image] =>[orig_patent_app_number] => 12713673
[rel_patent_id] =>[rel_patent_doc_number] =>) 12/713673 | High-density integrated circuitry for semiconductor memory | Feb 25, 2010 | Issued |
Array
(
[id] => 8549800
[patent_doc_number] => 08324685
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[patent_title] => 'Semiconductor device having a fin-type semiconductor region'
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Array
(
[id] => 7685933
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Array
(
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Array
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[patent_title] => 'Copper-containing C4 ball-limiting metallurgy stack for enhanced reliability of packaged structures and method of making same'
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[patent_app_number] => 12/655975
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Array
(
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/650406 | MULTI-CONFIGURATION PROCESSOR-MEMORY SUBSTRATE DEVICE | Dec 29, 2009 | Abandoned |
Array
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[patent_title] => 'STACKED TYPE CHIP PACKAGE STRUCTURE'
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[rel_patent_id] =>[rel_patent_doc_number] =>) 12/645440 | Stacked type chip package structure | Dec 21, 2009 | Issued |
Array
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Array
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Array
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Array
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