
Alexander G. Ghyka
Examiner (ID: 18931, Phone: (571)272-1669 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 1754, 1106, 2812, 2899, 1105 |
| Total Applications | 3052 |
| Issued Applications | 2465 |
| Pending Applications | 254 |
| Abandoned Applications | 366 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 20153355
[patent_doc_number] => 20250253193
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-08-07
[patent_title] => SEMICONDUCTOR DEVICE AND FABRICATION METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 19/190655
[patent_app_country] => US
[patent_app_date] => 2025-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -7
[patent_words_short_claim] => 127
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 19190655
[rel_patent_id] =>[rel_patent_doc_number] =>) 19/190655 | Semiconductor device and fabrication method thereof | Apr 26, 2025 | Issued |
Array
(
[id] => 19575054
[patent_doc_number] => 20240379346
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-14
[patent_title] => FORMING LOW-STRESS SILICON NITRIDE LAYER THROUGH HYDROGEN TREATMENT
[patent_app_type] => utility
[patent_app_number] => 18/783614
[patent_app_country] => US
[patent_app_date] => 2024-07-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8282
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18783614
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/783614 | FORMING LOW-STRESS SILICON NITRIDE LAYER THROUGH HYDROGEN TREATMENT | Jul 24, 2024 | Pending |
Array
(
[id] => 20089045
[patent_doc_number] => 20250218981
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-07-03
[patent_title] => SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/779133
[patent_app_country] => US
[patent_app_date] => 2024-07-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5372
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18779133
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/779133 | SEMICONDUCTOR DEVICE | Jul 21, 2024 | Pending |
Array
(
[id] => 19559899
[patent_doc_number] => 20240371691
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-11-07
[patent_title] => BOTTOM-UP FORMATION OF CONTACT PLUGS
[patent_app_type] => utility
[patent_app_number] => 18/774289
[patent_app_country] => US
[patent_app_date] => 2024-07-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8218
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 63
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18774289
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/774289 | BOTTOM-UP FORMATION OF CONTACT PLUGS | Jul 15, 2024 | Pending |
Array
(
[id] => 20004797
[patent_doc_number] => 20250143019
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-01
[patent_title] => LIGHT-EMITTING DEVICE AND LIGHT-EMITTING APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/771063
[patent_app_country] => US
[patent_app_date] => 2024-07-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2197
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18771063
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/771063 | LIGHT-EMITTING DEVICE AND LIGHT-EMITTING APPARATUS | Jul 11, 2024 | Pending |
Array
(
[id] => 19515873
[patent_doc_number] => 20240347559
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-17
[patent_title] => IMAGE SENSOR AND MANUFACTURING PROCESS THEREOF
[patent_app_type] => utility
[patent_app_number] => 18/754448
[patent_app_country] => US
[patent_app_date] => 2024-06-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5470
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18754448
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/754448 | Image sensor and manufacturing process thereof | Jun 25, 2024 | Issued |
Array
(
[id] => 20431182
[patent_doc_number] => 20250393276
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-25
[patent_title] => SEMICONDUCTOR DEVICE WITH ISOLATION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/753470
[patent_app_country] => US
[patent_app_date] => 2024-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3095
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18753470
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/753470 | SEMICONDUCTOR DEVICE WITH ISOLATION STRUCTURE AND METHOD FOR MANUFACTURING THE SAME | Jun 24, 2024 | Pending |
Array
(
[id] => 19662070
[patent_doc_number] => 20240429135
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-26
[patent_title] => METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE ASSEMBLY AS WELL AS A SEMICONDUCTOR PACKAGE ASSEMBLY OBTAINED WITH THIS METHOD
[patent_app_type] => utility
[patent_app_number] => 18/753745
[patent_app_country] => US
[patent_app_date] => 2024-06-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3242
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -15
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18753745
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/753745 | METHOD FOR MANUFACTURING A SEMICONDUCTOR PACKAGE ASSEMBLY AS WELL AS A SEMICONDUCTOR PACKAGE ASSEMBLY OBTAINED WITH THIS METHOD | Jun 24, 2024 | Pending |
Array
(
[id] => 19688211
[patent_doc_number] => 20250006756
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-01-02
[patent_title] => IMAGE SENSING MODULE MANUFACTURING METHOD
[patent_app_type] => utility
[patent_app_number] => 18/748992
[patent_app_country] => US
[patent_app_date] => 2024-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4769
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -21
[patent_words_short_claim] => 107
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748992
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/748992 | IMAGE SENSING MODULE MANUFACTURING METHOD | Jun 19, 2024 | Pending |
Array
(
[id] => 19951223
[patent_doc_number] => 12322594
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-03
[patent_title] => Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
[patent_app_type] => utility
[patent_app_number] => 18/748489
[patent_app_country] => US
[patent_app_date] => 2024-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 2296
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 115
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748489
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/748489 | Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer | Jun 19, 2024 | Issued |
Array
(
[id] => 20429717
[patent_doc_number] => 20250391810
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-25
[patent_title] => SYSTEMS FOR OPTICAL OXIDE DETECTION IN SEMICONDUCTOR DEVICES AND METHODS FOR PERFORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/748910
[patent_app_country] => US
[patent_app_date] => 2024-06-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4555
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 142
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18748910
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/748910 | SYSTEMS FOR OPTICAL OXIDE DETECTION IN SEMICONDUCTOR DEVICES AND METHODS FOR PERFORMING THE SAME | Jun 19, 2024 | Pending |
Array
(
[id] => 19483978
[patent_doc_number] => 20240332020
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-10-03
[patent_title] => TRENCH ETCHING PROCESS FOR PHOTORESIST LINE ROUGHNESS IMPROVEMENT
[patent_app_type] => utility
[patent_app_number] => 18/740970
[patent_app_country] => US
[patent_app_date] => 2024-06-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8217
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 39
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18740970
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/740970 | Trench etching process for photoresist line roughness improvement | Jun 11, 2024 | Issued |
Array
(
[id] => 20410059
[patent_doc_number] => 20250379168
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-11
[patent_title] => Semiconductor Packages and Methods of Forming Same
[patent_app_type] => utility
[patent_app_number] => 18/737238
[patent_app_country] => US
[patent_app_date] => 2024-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5438
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 79
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18737238
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/737238 | Semiconductor Packages and Methods of Forming Same | Jun 6, 2024 | Pending |
Array
(
[id] => 20396817
[patent_doc_number] => 20250372292
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-12-04
[patent_title] => METHOD FOR REDUCING MAGNETISM ON A MOLD CHASE
[patent_app_type] => utility
[patent_app_number] => 18/675719
[patent_app_country] => US
[patent_app_date] => 2024-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 61
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18675719
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/675719 | METHOD FOR REDUCING MAGNETISM ON A MOLD CHASE | May 27, 2024 | Pending |
Array
(
[id] => 19454974
[patent_doc_number] => 20240315104
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-09-19
[patent_title] => DISPLAY DEVICE AND ELECTRONIC APPARATUS
[patent_app_type] => utility
[patent_app_number] => 18/674136
[patent_app_country] => US
[patent_app_date] => 2024-05-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20904
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -14
[patent_words_short_claim] => 125
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18674136
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/674136 | Display device and electronic apparatus | May 23, 2024 | Issued |
Array
(
[id] => 20251148
[patent_doc_number] => 20250300017
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-09-25
[patent_title] => METHOD FOR FORMING SEMICONDUCTOR STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/670750
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 0
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 304
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18670750
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/670750 | METHOD FOR FORMING SEMICONDUCTOR STRUCTURE | May 21, 2024 | Pending |
Array
(
[id] => 20381842
[patent_doc_number] => 20250364335
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-11-27
[patent_title] => SYSTEMS AND METHODS FOR WAFER PROCESSING WITH SENSOR TECHNOLOGIES
[patent_app_type] => utility
[patent_app_number] => 18/671015
[patent_app_country] => US
[patent_app_date] => 2024-05-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7016
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 37
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18671015
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/671015 | SYSTEMS AND METHODS FOR WAFER PROCESSING WITH SENSOR TECHNOLOGIES | May 21, 2024 | Pending |
Array
(
[id] => 20489912
[patent_doc_number] => 20260026115
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2026-01-22
[patent_title] => SOLID-STATE IMAGING DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/668656
[patent_app_country] => US
[patent_app_date] => 2024-05-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 20034
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -5
[patent_words_short_claim] => 128
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18668656
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/668656 | SOLID-STATE IMAGING DEVICE | May 19, 2024 | Pending |
Array
(
[id] => 20037940
[patent_doc_number] => 20250176162
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2025-05-29
[patent_title] => CAPACITOR AND ELECTRONIC DEVICE INCLUDING THE SAME
[patent_app_type] => utility
[patent_app_number] => 18/664776
[patent_app_country] => US
[patent_app_date] => 2024-05-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 5608
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 82
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18664776
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/664776 | CAPACITOR AND ELECTRONIC DEVICE INCLUDING THE SAME | May 14, 2024 | Pending |
Array
(
[id] => 19621519
[patent_doc_number] => 20240407199
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-12-05
[patent_title] => OLED SUB-PIXEL CIRCUIT FORMATION AND STRUCTURE
[patent_app_type] => utility
[patent_app_number] => 18/661371
[patent_app_country] => US
[patent_app_date] => 2024-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6253
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18661371
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/661371 | OLED SUB-PIXEL CIRCUIT FORMATION AND STRUCTURE | May 9, 2024 | Pending |