
Alexander G. Ghyka
Examiner (ID: 18931, Phone: (571)272-1669 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 1754, 1106, 2812, 2899, 1105 |
| Total Applications | 3052 |
| Issued Applications | 2465 |
| Pending Applications | 254 |
| Abandoned Applications | 366 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 19974034
[patent_doc_number] => 12342668
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-06-24
[patent_title] => Display device and manufacturing method thereof
[patent_app_type] => utility
[patent_app_number] => 17/354368
[patent_app_country] => US
[patent_app_date] => 2021-06-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 28
[patent_no_of_words] => 17239
[patent_no_of_claims] => 17
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 246
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17354368
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/354368 | Display device and manufacturing method thereof | Jun 21, 2021 | Issued |
Array
(
[id] => 19016254
[patent_doc_number] => 11923195
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-03-05
[patent_title] => Single crystal semiconductor structure and method of manufacturing the same
[patent_app_type] => utility
[patent_app_number] => 17/352851
[patent_app_country] => US
[patent_app_date] => 2021-06-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 13
[patent_no_of_words] => 7214
[patent_no_of_claims] => 29
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 194
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17352851
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/352851 | Single crystal semiconductor structure and method of manufacturing the same | Jun 20, 2021 | Issued |
Array
(
[id] => 17145325
[patent_doc_number] => 20210313338
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => INTEGRAL MULTIFUNCTION CHIP
[patent_app_type] => utility
[patent_app_number] => 17/351954
[patent_app_country] => US
[patent_app_date] => 2021-06-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3022
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -3
[patent_words_short_claim] => 49
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17351954
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/351954 | Integral multifunction chip | Jun 17, 2021 | Issued |
Array
(
[id] => 17145340
[patent_doc_number] => 20210313353
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-07
[patent_title] => TRANSISTOR, LIQUID CRYSTAL DISPLAY DEVICE, AND MANUFACTURING METHOD THEREOF
[patent_app_type] => utility
[patent_app_number] => 17/350133
[patent_app_country] => US
[patent_app_date] => 2021-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 22704
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -29
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350133
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/350133 | Transistor, liquid crystal display device, and manufacturing method thereof | Jun 16, 2021 | Issued |
Array
(
[id] => 18000868
[patent_doc_number] => 11501979
[patent_country] => US
[patent_kind] => B1
[patent_issue_date] => 2022-11-15
[patent_title] => Semiconductor device and method of producing a semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/350345
[patent_app_country] => US
[patent_app_date] => 2021-06-17
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 16
[patent_no_of_words] => 6194
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 134
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17350345
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/350345 | Semiconductor device and method of producing a semiconductor device | Jun 16, 2021 | Issued |
Array
(
[id] => 17188821
[patent_doc_number] => 20210335706
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-10-28
[patent_title] => SEMICONDUCTOR DEVICE INCLUDING A POROUS DIELECTRIC LAYER, AND METHOD OF FORMING THE SEMICONDUCTOR DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/341112
[patent_app_country] => US
[patent_app_date] => 2021-06-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4984
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 86
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17341112
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/341112 | Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device | Jun 6, 2021 | Issued |
Array
(
[id] => 19907821
[patent_doc_number] => 12284851
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-04-22
[patent_title] => Display panel, method for manufacturing the same, and display apparatus
[patent_app_type] => utility
[patent_app_number] => 17/789593
[patent_app_country] => US
[patent_app_date] => 2021-05-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 14
[patent_no_of_words] => 3851
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 188
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17789593
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/789593 | Display panel, method for manufacturing the same, and display apparatus | May 27, 2021 | Issued |
Array
(
[id] => 18410591
[patent_doc_number] => 20230171944
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => A Memory Device Comprising an Electrically Floating Body Transistor
[patent_app_type] => utility
[patent_app_number] => 17/927620
[patent_app_country] => US
[patent_app_date] => 2021-05-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8034
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -16
[patent_words_short_claim] => 48
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17927620
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/927620 | A Memory Device Comprising an Electrically Floating Body Transistor | May 24, 2021 | Pending |
Array
(
[id] => 17232191
[patent_doc_number] => 20210358748
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-11-18
[patent_title] => INTEGRATION OF A III-V CONSTRUCTION ON A GROUP IV SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 17/323540
[patent_app_country] => US
[patent_app_date] => 2021-05-18
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7591
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 116
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17323540
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/323540 | Integration of a III-V construction on a group IV substrate | May 17, 2021 | Issued |
Array
(
[id] => 17630613
[patent_doc_number] => 20220165628
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-05-26
[patent_title] => MANUFACTURING METHOD OF PACKAGE DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/315389
[patent_app_country] => US
[patent_app_date] => 2021-05-10
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8953
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -19
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17315389
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/315389 | Manufacturing method of package device | May 9, 2021 | Issued |
Array
(
[id] => 19679271
[patent_doc_number] => 12191143
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-01-07
[patent_title] => Semiconductor device and method for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/313379
[patent_app_country] => US
[patent_app_date] => 2021-05-06
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 35
[patent_figures_cnt] => 39
[patent_no_of_words] => 15496
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 169
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17313379
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/313379 | Semiconductor device and method for forming the same | May 5, 2021 | Issued |
Array
(
[id] => 17070637
[patent_doc_number] => 20210272854
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => FABRICATION OF A VERTICAL FIN FIELD EFFECT TRANSISTOR WITH REDUCED DIMENSIONAL VARIATIONS
[patent_app_type] => utility
[patent_app_number] => 17/306669
[patent_app_country] => US
[patent_app_date] => 2021-05-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9351
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17306669
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/306669 | Fabrication of a vertical fin field effect transistor with reduced dimensional variations | May 2, 2021 | Issued |
Array
(
[id] => 19288333
[patent_doc_number] => 20240224816
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2024-07-04
[patent_title] => SEMICONDUCTOR DEVICE AND METHODS FOR FABRICATING AND OPERATING THE DEVICE
[patent_app_type] => utility
[patent_app_number] => 18/554168
[patent_app_country] => US
[patent_app_date] => 2021-04-29
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6535
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18554168
[rel_patent_id] =>[rel_patent_doc_number] =>) 18/554168 | Semiconductor device and methods for fabricating and operating the device | Apr 28, 2021 | Issued |
Array
(
[id] => 17536775
[patent_doc_number] => 20220115384
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-04-14
[patent_title] => METHOD FOR FABRICATING SEMICONDUCTOR DEVICES
[patent_app_type] => utility
[patent_app_number] => 17/242932
[patent_app_country] => US
[patent_app_date] => 2021-04-28
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6852
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 143
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242932
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/242932 | Method for fabricating semiconductor devices | Apr 27, 2021 | Issued |
Array
(
[id] => 17056072
[patent_doc_number] => 20210265506
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-26
[patent_title] => DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/242207
[patent_app_country] => US
[patent_app_date] => 2021-04-27
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8095
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => 0
[patent_words_short_claim] => 120
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17242207
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/242207 | DISPLAY DEVICE AND METHOD OF MANUFACTURING THE SAME | Apr 26, 2021 | Abandoned |
Array
(
[id] => 18751464
[patent_doc_number] => 11810784
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-07
[patent_title] => Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer
[patent_app_type] => utility
[patent_app_number] => 17/236289
[patent_app_country] => US
[patent_app_date] => 2021-04-21
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 11
[patent_figures_cnt] => 13
[patent_no_of_words] => 5981
[patent_no_of_claims] => 27
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 102
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17236289
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/236289 | Method for making semiconductor device including a superlattice and enriched silicon 28 epitaxial layer | Apr 20, 2021 | Issued |
Array
(
[id] => 18500459
[patent_doc_number] => 20230223251
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-07-13
[patent_title] => METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING DEVICE, AND SYSTEM
[patent_app_type] => utility
[patent_app_number] => 17/997158
[patent_app_country] => US
[patent_app_date] => 2021-04-20
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 18747
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 55
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17997158
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/997158 | METHOD OF MANUFACTURING SEMICONDUCTOR DEVICE, SEMICONDUCTOR MANUFACTURING DEVICE, AND SYSTEM | Apr 19, 2021 | Pending |
Array
(
[id] => 17925911
[patent_doc_number] => 11469174
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-11
[patent_title] => Semiconductor device
[patent_app_type] => utility
[patent_app_number] => 17/231915
[patent_app_country] => US
[patent_app_date] => 2021-04-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 17
[patent_figures_cnt] => 17
[patent_no_of_words] => 11068
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 214
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17231915
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/231915 | Semiconductor device | Apr 14, 2021 | Issued |
Array
(
[id] => 17431645
[patent_doc_number] => 20220059354
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-02-24
[patent_title] => METHOD FOR MAKING MOSFET AND MOSFET
[patent_app_type] => utility
[patent_app_number] => 17/230234
[patent_app_country] => US
[patent_app_date] => 2021-04-14
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4187
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 162
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17230234
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/230234 | Method for making MOSFET and MOSFET | Apr 13, 2021 | Issued |
Array
(
[id] => 16992320
[patent_doc_number] => 20210230740
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-29
[patent_title] => SPUTTERING TARGET, METHOD FOR MANUFACTURING SPUTTERING TARGET, AND METHOD FOR FORMING THIN FILM
[patent_app_type] => utility
[patent_app_number] => 17/228847
[patent_app_country] => US
[patent_app_date] => 2021-04-13
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 30803
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -9
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228847
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/228847 | Semiconductor device comprising oxide semiconductor film | Apr 12, 2021 | Issued |