
Alexander G. Ghyka
Examiner (ID: 18931, Phone: (571)272-1669 , Office: P/2812 )
| Most Active Art Unit | 2812 |
| Art Unit(s) | 1754, 1106, 2812, 2899, 1105 |
| Total Applications | 3052 |
| Issued Applications | 2465 |
| Pending Applications | 254 |
| Abandoned Applications | 366 |
Applications
| Application number | Title of the application | Filing Date | Status |
|---|---|---|---|
Array
(
[id] => 18876522
[patent_doc_number] => 11864367
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2024-01-02
[patent_title] => Bonded semiconductor devices having processor and NAND flash memory and methods for forming the same
[patent_app_type] => utility
[patent_app_number] => 17/228496
[patent_app_country] => US
[patent_app_date] => 2021-04-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 22
[patent_figures_cnt] => 33
[patent_no_of_words] => 20201
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 320
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17228496
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/228496 | Bonded semiconductor devices having processor and NAND flash memory and methods for forming the same | Apr 11, 2021 | Issued |
Array
(
[id] => 18782274
[patent_doc_number] => 11824041
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-21
[patent_title] => Hyperchip
[patent_app_type] => utility
[patent_app_number] => 17/226967
[patent_app_country] => US
[patent_app_date] => 2021-04-09
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 14
[patent_no_of_words] => 6699
[patent_no_of_claims] => 14
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17226967
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/226967 | Hyperchip | Apr 8, 2021 | Issued |
Array
(
[id] => 17908543
[patent_doc_number] => 11462403
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-10-04
[patent_title] => Semiconductor structure and method for manufacturing same
[patent_app_type] => utility
[patent_app_number] => 17/225959
[patent_app_country] => US
[patent_app_date] => 2021-04-08
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 3686
[patent_no_of_claims] => 6
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 220
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17225959
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/225959 | Semiconductor structure and method for manufacturing same | Apr 7, 2021 | Issued |
Array
(
[id] => 18446979
[patent_doc_number] => 11682555
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-06-20
[patent_title] => Methods of manufacturing semiconductor devices
[patent_app_type] => utility
[patent_app_number] => 17/224365
[patent_app_country] => US
[patent_app_date] => 2021-04-07
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 24
[patent_figures_cnt] => 24
[patent_no_of_words] => 6612
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 275
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17224365
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/224365 | Methods of manufacturing semiconductor devices | Apr 6, 2021 | Issued |
Array
(
[id] => 16981312
[patent_doc_number] => 20210225549
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-22
[patent_title] => SOLAR ACTIVE POWDER FOR FUSION POWDER COATING
[patent_app_type] => utility
[patent_app_number] => 17/222384
[patent_app_country] => US
[patent_app_date] => 2021-04-05
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3394
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -8
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17222384
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/222384 | SOLAR ACTIVE POWDER FOR FUSION POWDER COATING | Apr 4, 2021 | Abandoned |
Array
(
[id] => 18473019
[patent_doc_number] => 20230207307
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-29
[patent_title] => COMPOSITE SUBSTRATE AND PRODUCTION METHOD THEREFOR
[patent_app_type] => utility
[patent_app_number] => 17/906733
[patent_app_country] => US
[patent_app_date] => 2021-04-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 4940
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -10
[patent_words_short_claim] => 44
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17906733
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/906733 | Composite substrate and production method therefor | Mar 31, 2021 | Issued |
Array
(
[id] => 17862880
[patent_doc_number] => 11444041
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-09-13
[patent_title] => Process of realization of an area of individualization of an integrated circuit
[patent_app_type] => utility
[patent_app_number] => 17/216794
[patent_app_country] => US
[patent_app_date] => 2021-03-30
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 10
[patent_figures_cnt] => 42
[patent_no_of_words] => 8224
[patent_no_of_claims] => 13
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 329
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17216794
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/216794 | Process of realization of an area of individualization of an integrated circuit | Mar 29, 2021 | Issued |
Array
(
[id] => 20480547
[patent_doc_number] => 12529018
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2026-01-20
[patent_title] => Method for cleaning semiconductor substrate, method for producing processed semiconductor substrate, and stripping composition
[patent_app_type] => utility
[patent_app_number] => 17/913639
[patent_app_country] => US
[patent_app_date] => 2021-03-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 7456
[patent_no_of_claims] => 18
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 124
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17913639
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/913639 | Method for cleaning semiconductor substrate, method for producing processed semiconductor substrate, and stripping composition | Mar 21, 2021 | Issued |
Array
(
[id] => 20375257
[patent_doc_number] => 12482701
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2025-11-25
[patent_title] => Method for producing a stacked structure
[patent_app_type] => utility
[patent_app_number] => 17/907043
[patent_app_country] => US
[patent_app_date] => 2021-03-16
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 8
[patent_figures_cnt] => 21
[patent_no_of_words] => 2248
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 205
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17907043
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/907043 | Method for producing a stacked structure | Mar 15, 2021 | Issued |
Array
(
[id] => 16936401
[patent_doc_number] => 20210202290
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => Info Structure with Copper Pillar Having Reversed Profile
[patent_app_type] => utility
[patent_app_number] => 17/201284
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 6064
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 119
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17201284
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/201284 | Info structure with copper pillar having reversed profile | Mar 14, 2021 | Issued |
Array
(
[id] => 16936606
[patent_doc_number] => 20210202495
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-07-01
[patent_title] => BONDED SEMICONDUCTOR DEVICES HAVING PROCESSOR AND STATIC RANDOM-ACCESS MEMORY AND METHODS FOR FORMING THE SAME
[patent_app_type] => utility
[patent_app_number] => 17/202200
[patent_app_country] => US
[patent_app_date] => 2021-03-15
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12885
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 175
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17202200
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/202200 | Bonded semiconductor devices having processor and static random-access memory and methods for forming the same | Mar 14, 2021 | Issued |
Array
(
[id] => 17716691
[patent_doc_number] => 11380690
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2022-07-05
[patent_title] => Semiconductor device and method of fabricating the same
[patent_app_type] => utility
[patent_app_number] => 17/186936
[patent_app_country] => US
[patent_app_date] => 2021-02-26
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 21
[patent_figures_cnt] => 24
[patent_no_of_words] => 7083
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 129
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17186936
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/186936 | Semiconductor device and method of fabricating the same | Feb 25, 2021 | Issued |
Array
(
[id] => 18704640
[patent_doc_number] => 11791157
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-10-17
[patent_title] => Semiconductor on diamond substrate, precursor for use in preparing a semiconductor on diamond substrate, and methods for making the same
[patent_app_type] => utility
[patent_app_number] => 17/185191
[patent_app_country] => US
[patent_app_date] => 2021-02-25
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 4
[patent_figures_cnt] => 4
[patent_no_of_words] => 8241
[patent_no_of_claims] => 9
[patent_no_of_ind_claims] => 1
[patent_words_short_claim] => 178
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17185191
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/185191 | Semiconductor on diamond substrate, precursor for use in preparing a semiconductor on diamond substrate, and methods for making the same | Feb 24, 2021 | Issued |
Array
(
[id] => 17070641
[patent_doc_number] => 20210272858
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => Transmission-Based Temperature Measurement of a Workpiece in a Thermal Processing System
[patent_app_type] => utility
[patent_app_number] => 17/183992
[patent_app_country] => US
[patent_app_date] => 2021-02-24
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 12794
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -18
[patent_words_short_claim] => 184
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17183992
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/183992 | Transmission-based temperature measurement of a workpiece in a thermal processing system | Feb 23, 2021 | Issued |
Array
(
[id] => 18410648
[patent_doc_number] => 20230172001
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2023-06-01
[patent_title] => DISPLAY PANEL, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICE
[patent_app_type] => utility
[patent_app_number] => 17/618005
[patent_app_country] => US
[patent_app_date] => 2021-02-23
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 9015
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 2
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17618005
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/618005 | Display panel, method for manufacturing same, and display device | Feb 22, 2021 | Issued |
Array
(
[id] => 17485972
[patent_doc_number] => 20220093476
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2022-03-24
[patent_title] => System and Method for Warpage Detection in a CMOS Bonded Array
[patent_app_type] => utility
[patent_app_number] => 17/181675
[patent_app_country] => US
[patent_app_date] => 2021-02-22
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 2284
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 65
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17181675
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/181675 | System and method for warpage detection in a CMOS bonded array | Feb 21, 2021 | Issued |
Array
(
[id] => 18782135
[patent_doc_number] => 11823901
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-11-21
[patent_title] => System and method for radical and thermal processing of substrates
[patent_app_type] => utility
[patent_app_number] => 17/174395
[patent_app_country] => US
[patent_app_date] => 2021-02-12
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 7
[patent_figures_cnt] => 7
[patent_no_of_words] => 7583
[patent_no_of_claims] => 20
[patent_no_of_ind_claims] => 3
[patent_words_short_claim] => 95
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17174395
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/174395 | System and method for radical and thermal processing of substrates | Feb 11, 2021 | Issued |
Array
(
[id] => 17010910
[patent_doc_number] => 20210242071
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-08-05
[patent_title] => MANUFACTURING PROCESS OF A STRUCTURED SUBSTRATE
[patent_app_type] => utility
[patent_app_number] => 17/166028
[patent_app_country] => US
[patent_app_date] => 2021-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 3963
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -12
[patent_words_short_claim] => 81
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17166028
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/166028 | Manufacturing process of a structured substrate | Feb 2, 2021 | Issued |
Array
(
[id] => 17070592
[patent_doc_number] => 20210272809
[patent_country] => US
[patent_kind] => A1
[patent_issue_date] => 2021-09-02
[patent_title] => METHOD AND APPARATUS FOR REDUCING IMPURITY IN A FILM
[patent_app_type] => utility
[patent_app_number] => 17/165941
[patent_app_country] => US
[patent_app_date] => 2021-02-03
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 0
[patent_figures_cnt] => 0
[patent_no_of_words] => 8637
[patent_no_of_claims] => 0
[patent_no_of_ind_claims] => -17
[patent_words_short_claim] => 43
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => publication
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17165941
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/165941 | METHOD AND APPARATUS FOR REDUCING IMPURITY IN A FILM | Feb 2, 2021 | Abandoned |
Array
(
[id] => 18603970
[patent_doc_number] => 11745415
[patent_country] => US
[patent_kind] => B2
[patent_issue_date] => 2023-09-05
[patent_title] => Optoelectronic semiconductor component and 3D printer
[patent_app_type] => utility
[patent_app_number] => 17/164456
[patent_app_country] => US
[patent_app_date] => 2021-02-01
[patent_effective_date] => 0000-00-00
[patent_drawing_sheets_cnt] => 5
[patent_figures_cnt] => 14
[patent_no_of_words] => 7484
[patent_no_of_claims] => 19
[patent_no_of_ind_claims] => 2
[patent_words_short_claim] => 67
[patent_maintenance] => 1
[patent_no_of_assignments] => 0
[patent_current_assignee] =>[type] => patent
[pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17164456
[rel_patent_id] =>[rel_patent_doc_number] =>) 17/164456 | Optoelectronic semiconductor component and 3D printer | Jan 31, 2021 | Issued |