Alexander G. Ghyka

Array ( [id] => 19497818 [patent_doc_number] => 20240336836 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => METAL IRIDIUM COMPLEX AND ELECTROLUMINESCENT DEVICE [patent_app_type] => utility [patent_app_number] => 18/658432 [patent_app_country] => US [patent_app_date] => 2024-05-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8991 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 388 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18658432 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20416791 [patent_doc_number] => 12500084 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-12-16 [patent_title] => Semiconductor manufacturing apparatus and method of manufacturing semiconductor device [patent_app_type] => utility [patent_app_number] => 18/656987 [patent_app_country] => US [patent_app_date] => 2024-05-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 30 [patent_no_of_words] => 10217 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 89 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18656987 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19392731 [patent_doc_number] => 20240282601 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => METHODS OF SELECTIVE OXIDATION ON RAPID THERMAL PROCESSING (RTP) CHAMBER WITH ACTIVE STEAM GENERATION [patent_app_type] => utility [patent_app_number] => 18/653955 [patent_app_country] => US [patent_app_date] => 2024-05-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4130 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -11 [patent_words_short_claim] => 165 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18653955 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19945429 [patent_doc_number] => 12317579 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-05-27 [patent_title] => Method for manufacturing semiconductor device structure [patent_app_type] => utility [patent_app_number] => 18/637723 [patent_app_country] => US [patent_app_date] => 2024-04-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 20 [patent_figures_cnt] => 20 [patent_no_of_words] => 2949 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637723 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19349417 [patent_doc_number] => 20240258381 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => METHOD FOR PREPARING RECESSED GATE STRUCTURE WITH PROTECTION LAYER [patent_app_type] => utility [patent_app_number] => 18/636545 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4797 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 143 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636545 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20979723 [patent_doc_number] => 12740453 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Semiconductor module [patent_app_type] => utility [patent_app_number] => 18/637365 [patent_app_country] => US [patent_app_date] => 2024-04-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 6803 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 322 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18637365 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20113327 [patent_doc_number] => 12364083 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-15 [patent_title] => Display device [patent_app_type] => utility [patent_app_number] => 18/636253 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 22 [patent_no_of_words] => 13422 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18636253 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20031015 [patent_doc_number] => 20250169237 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-22 [patent_title] => INTEGRATED OPTICAL ELEMENT AND FORMING METHOD OF METASURFACE [patent_app_type] => utility [patent_app_number] => 18/635017 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 62 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635017 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19349132 [patent_doc_number] => 20240258096 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => METHOD AND STRUCTURE FOR SEMICONDUCTOR INTERCONNECT [patent_app_type] => utility [patent_app_number] => 18/635270 [patent_app_country] => US [patent_app_date] => 2024-04-15 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7007 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18635270 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19840403 [patent_doc_number] => 12252775 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-03-18 [patent_title] => Sputtering target, method for manufacturing sputtering target, and method for forming thin film [patent_app_type] => utility [patent_app_number] => 18/633854 [patent_app_country] => US [patent_app_date] => 2024-04-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 45 [patent_figures_cnt] => 90 [patent_no_of_words] => 30800 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 460 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18633854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19698476 [patent_doc_number] => 20250017021 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-01-09 [patent_title] => SEMICONDUCTOR MEMORY DEVICES AND MANUFACTURING METHODS THEREOF [patent_app_type] => utility [patent_app_number] => 18/630647 [patent_app_country] => US [patent_app_date] => 2024-04-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11179 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 215 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18630647 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19500416 [patent_doc_number] => 20240339434 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-10-10 [patent_title] => 3D GATE CONTROL CONNECTION OF A POWER MODULE WITH AT LEAST ONE CONTROLLED POWER SEMICONDUCTOR DIE [patent_app_type] => utility [patent_app_number] => 18/624674 [patent_app_country] => US [patent_app_date] => 2024-04-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1185 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -21 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18624674 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20283909 [patent_doc_number] => 20250309151 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-10-02 [patent_title] => HIGH-CMTI ISOLATOR LINK DESIGN AND RELATED METHODS [patent_app_type] => utility [patent_app_number] => 18/618003 [patent_app_country] => US [patent_app_date] => 2024-03-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 50 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18618003 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19321552 [patent_doc_number] => 20240243099 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => HYPERCHIP [patent_app_type] => utility [patent_app_number] => 18/615654 [patent_app_country] => US [patent_app_date] => 2024-03-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6747 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 136 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18615654 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20013217 [patent_doc_number] => 20250151439 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-05-08 [patent_title] => IMAGE SENSING DEVICE [patent_app_type] => utility [patent_app_number] => 18/613873 [patent_app_country] => US [patent_app_date] => 2024-03-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1121 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613873 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20251146 [patent_doc_number] => 20250300015 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2025-09-25 [patent_title] => SELECTIVE TUNGSTEN NAND DEEP CONTACT GAP BOTTOM FILL [patent_app_type] => utility [patent_app_number] => 18/613073 [patent_app_country] => US [patent_app_date] => 2024-03-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 0 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 104 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18613073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19407153 [patent_doc_number] => 20240290664 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => Transmission-Based Temperature Measurement of a Workpiece in a Thermal Processing System [patent_app_type] => utility [patent_app_number] => 18/597421 [patent_app_country] => US [patent_app_date] => 2024-03-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12816 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18597421 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 19337108 [patent_doc_number] => 20240251538 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => BONDED SEMICONDUCTOR DEVICES HAVING PROCESSOR AND STATIC RANDOM-ACCESS MEMORY AND METHODS FOR FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/587031 [patent_app_country] => US [patent_app_date] => 2024-02-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 12913 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -4 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18587031 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20705757 [patent_doc_number] => 12628486 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-05-12 [patent_title] => LED display apparatus having micro LED module [patent_app_type] => utility [patent_app_number] => 18/444112 [patent_app_country] => US [patent_app_date] => 2024-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 16 [patent_no_of_words] => 1256 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 180 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18444112 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 20119692 [patent_doc_number] => 12369431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-07-22 [patent_title] => Method of selectively transferring semiconductor device [patent_app_type] => utility [patent_app_number] => 18/440306 [patent_app_country] => US [patent_app_date] => 2024-02-13 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 34 [patent_figures_cnt] => 91 [patent_no_of_words] => 9743 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 103 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18440306 [rel_patent_id] =>[rel_patent_doc_number] =>)