Alexander G. Ghyka

Array ( [id] => 15185391 [patent_doc_number] => 20190363287 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => METHOD FOR PRODUCING ORGANIC ELECTROLUMINESCENT DEVICE AND FILM DEPOSITION APPARATUS [patent_app_type] => utility [patent_app_number] => 15/750609 [patent_app_country] => US [patent_app_date] => 2017-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17828 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15750609 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15185161 [patent_doc_number] => 20190363172 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-11-28 [patent_title] => METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE, METHOD FOR MANUFACTURING ORGANIC EL DISPLAY DEVICE, AND ACTIVE MATRIX SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/064538 [patent_app_country] => US [patent_app_date] => 2017-03-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11702 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16064538 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 14110043 [patent_doc_number] => 20190096697 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-03-28 [patent_title] => METHOD FOR ALIGNING CHIP COMPONENTS RELATIVE TO SUBSTRATE BY USING LIQUID [patent_app_type] => utility [patent_app_number] => 16/085205 [patent_app_country] => US [patent_app_date] => 2017-03-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5744 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 233 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16085205 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16487640 [patent_doc_number] => 20200381249 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-12-03 [patent_title] => METHOD FOR FABRICATING A SEMICONDUCTOR SUBSTRATE [patent_app_type] => utility [patent_app_number] => 16/082073 [patent_app_country] => US [patent_app_date] => 2017-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6333 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 23 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16082073 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15218285 [patent_doc_number] => 20190371829 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2019-12-05 [patent_title] => METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE AND METHOD FOR MANUFACTURING ORGANIC EL DISPLAY [patent_app_type] => utility [patent_app_number] => 16/064536 [patent_app_country] => US [patent_app_date] => 2017-02-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8359 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -7 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16064536 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15250925 [patent_doc_number] => 10510993 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2019-12-17 [patent_title] => Production method for EL device [patent_app_type] => utility [patent_app_number] => 16/064022 [patent_app_country] => US [patent_app_date] => 2017-02-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 19 [patent_no_of_words] => 4611 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 114 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16064022 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16684435 [patent_doc_number] => 10943926 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2021-03-09 [patent_title] => Thin-film transistor, array substrate, display panel and display device and fabrication method thereof [patent_app_type] => utility [patent_app_number] => 15/556941 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 11 [patent_no_of_words] => 5526 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 172 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15556941 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 16348016 [patent_doc_number] => 20200312667 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2020-10-01 [patent_title] => SUBSTRATE LIQUID PROCESSING APPARATUS, SUBSTRATE LIQUID PROCESSING METHOD, AND COMPUTER-REDABLE STORAGE MEDIUM HAVING SUBSTRATE LIQUID PROCESSING PROGRAM STORED THEREIN [patent_app_type] => utility [patent_app_number] => 16/089670 [patent_app_country] => US [patent_app_date] => 2017-02-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5154 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 137 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 16089670 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13754839 [patent_doc_number] => 10170371 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-01-01 [patent_title] => Fabrication of a vertical fin field effect transistor with reduced dimensional variations [patent_app_type] => utility [patent_app_number] => 15/425158 [patent_app_country] => US [patent_app_date] => 2017-02-06 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9234 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15425158 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11652980 [patent_doc_number] => 20170148881 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-25 [patent_title] => 'SEMICONDUCTOR DEVICES AND METHODS FOR MANUFACTURING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/424642 [patent_app_country] => US [patent_app_date] => 2017-02-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 13 [patent_no_of_words] => 5641 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15424642 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11619580 [patent_doc_number] => 20170129767 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-05-11 [patent_title] => 'SUBSTRATE STRUCTURE, SEMICONDUCTOR STRUCTURE AND METHOD FOR FABRICATING THE SAME' [patent_app_type] => utility [patent_app_number] => 15/411957 [patent_app_country] => US [patent_app_date] => 2017-01-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 12 [patent_figures_cnt] => 12 [patent_no_of_words] => 5346 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15411957 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12437070 [patent_doc_number] => 09978874 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-05-22 [patent_title] => Gate-all-around fin device [patent_app_type] => utility [patent_app_number] => 15/402504 [patent_app_country] => US [patent_app_date] => 2017-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 13 [patent_no_of_words] => 3463 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 155 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15402504 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11592959 [patent_doc_number] => 20170117370 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-27 [patent_title] => 'TRANSISTOR STRUCTURE WITH REDUCED PARASITIC \"SIDE WALL\" CHARACTERISTICS' [patent_app_type] => utility [patent_app_number] => 15/401146 [patent_app_country] => US [patent_app_date] => 2017-01-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 10065 [patent_no_of_claims] => 10 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15401146 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15427885 [patent_doc_number] => 10546882 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-01-28 [patent_title] => Array substrate and manufacturing method thereof, display panel and display device [patent_app_type] => utility [patent_app_number] => 15/535391 [patent_app_country] => US [patent_app_date] => 2017-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 10 [patent_no_of_words] => 4877 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 72 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15535391 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 15673145 [patent_doc_number] => 10600814 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2020-03-24 [patent_title] => Array substrate, display panel and display device [patent_app_type] => utility [patent_app_number] => 15/544841 [patent_app_country] => US [patent_app_date] => 2017-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5680 [patent_no_of_claims] => 19 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15544841 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13217489 [patent_doc_number] => 10123129 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-11-06 [patent_title] => MEMS device and process [patent_app_type] => utility [patent_app_number] => 15/398251 [patent_app_country] => US [patent_app_date] => 2017-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 19 [patent_no_of_words] => 7494 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 90 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15398251 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11939745 [patent_doc_number] => 20170243895 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-08-24 [patent_title] => 'SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF, DELAMINATION METHOD, AND TRANSFERRING METHOD' [patent_app_type] => utility [patent_app_number] => 15/397045 [patent_app_country] => US [patent_app_date] => 2017-01-03 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 33 [patent_figures_cnt] => 33 [patent_no_of_words] => 9569 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15397045 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11571984 [patent_doc_number] => 20170110628 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-04-20 [patent_title] => 'Semiconductor Structure with Stress-Reducing Buffer Structure' [patent_app_type] => utility [patent_app_number] => 15/391994 [patent_app_country] => US [patent_app_date] => 2016-12-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 12969 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391994 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11967433 [patent_doc_number] => 20170271586 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-09-21 [patent_title] => 'SEMICONDUCTOR MEMORY DEVICE' [patent_app_type] => utility [patent_app_number] => 15/391039 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 5875 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391039 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12534939 [patent_doc_number] => 10008504 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2018-06-26 [patent_title] => Memory arrays [patent_app_type] => utility [patent_app_number] => 15/391138 [patent_app_country] => US [patent_app_date] => 2016-12-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 26 [patent_figures_cnt] => 26 [patent_no_of_words] => 8185 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 300 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15391138 [rel_patent_id] =>[rel_patent_doc_number] =>)