Alexander G. Ghyka

Array ( [id] => 10750826 [patent_doc_number] => 20160096977 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-04-07 [patent_title] => 'COMPOSITION FOR FORMING A COATING TYPE SILICON-CONTAINING FILM, SUBSTRATE, AND PATTERNING PROCESS' [patent_app_type] => utility [patent_app_number] => 14/855772 [patent_app_country] => US [patent_app_date] => 2015-09-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 20637 [patent_no_of_claims] => 26 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14855772 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11207862 [patent_doc_number] => 09437493 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-06 [patent_title] => 'Method of forming a semiconductor die' [patent_app_type] => utility [patent_app_number] => 14/849779 [patent_app_country] => US [patent_app_date] => 2015-09-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 25 [patent_figures_cnt] => 28 [patent_no_of_words] => 16354 [patent_no_of_claims] => 4 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 153 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14849779 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10479355 [patent_doc_number] => 20150364372 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-17 [patent_title] => 'DOUBLE SELF-ALIGNED VIA PATTERNING' [patent_app_type] => utility [patent_app_number] => 14/837865 [patent_app_country] => US [patent_app_date] => 2015-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5678 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14837865 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10486876 [patent_doc_number] => 20150371896 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-12-24 [patent_title] => 'DOUBLE SELF ALIGNED VIA PATTERNING' [patent_app_type] => utility [patent_app_number] => 14/837827 [patent_app_country] => US [patent_app_date] => 2015-08-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 27 [patent_figures_cnt] => 27 [patent_no_of_words] => 5679 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14837827 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13031065 [patent_doc_number] => 10038159 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-07-31 [patent_title] => Organic electroluminescent device structure and manufacturing for the same [patent_app_type] => utility [patent_app_number] => 14/785856 [patent_app_country] => US [patent_app_date] => 2015-08-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 9 [patent_no_of_words] => 3244 [patent_no_of_claims] => 5 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 257 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14785856 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13174235 [patent_doc_number] => 10103242 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-10-16 [patent_title] => Growing groups III-V lateral nanowire channels [patent_app_type] => utility [patent_app_number] => 14/824461 [patent_app_country] => US [patent_app_date] => 2015-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 13 [patent_no_of_words] => 2186 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14824461 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13293605 [patent_doc_number] => 10158003 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-12-18 [patent_title] => Epitaxial and silicide layer formation at top and bottom surfaces of semiconductor fins [patent_app_type] => utility [patent_app_number] => 14/824349 [patent_app_country] => US [patent_app_date] => 2015-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 4025 [patent_no_of_claims] => 7 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 148 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14824349 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 12953401 [patent_doc_number] => 09837277 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2017-12-05 [patent_title] => Forming a contact for a tall fin transistor [patent_app_type] => utility [patent_app_number] => 14/824360 [patent_app_country] => US [patent_app_date] => 2015-08-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 21 [patent_figures_cnt] => 21 [patent_no_of_words] => 4182 [patent_no_of_claims] => 6 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 129 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14824360 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11446485 [patent_doc_number] => 20170047506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'MAGNETIC FIELD SENSOR BASED ON TOPOLOGICAL INSULATOR AND INSULATING COUPLER MATERIALS' [patent_app_type] => utility [patent_app_number] => 14/823541 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 7273 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823541 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11446254 [patent_doc_number] => 20170047275 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-16 [patent_title] => 'REDUCING LEAD STRESS IN MICRO-ELECTRONIC PACKAGES' [patent_app_type] => utility [patent_app_number] => 14/823486 [patent_app_country] => US [patent_app_date] => 2015-08-11 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 10 [patent_figures_cnt] => 10 [patent_no_of_words] => 4115 [patent_no_of_claims] => 17 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14823486 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11437386 [patent_doc_number] => 20170038407 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-09 [patent_title] => 'Device and System for Relative Motion Sensing' [patent_app_type] => utility [patent_app_number] => 14/821354 [patent_app_country] => US [patent_app_date] => 2015-08-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 1817 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14821354 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11781732 [patent_doc_number] => 09390931 [patent_country] => US [patent_kind] => B1 [patent_issue_date] => 2016-07-12 [patent_title] => 'Manufacturing method of strip-shaped conductive structures and non-volatile memory cell' [patent_app_type] => utility [patent_app_number] => 14/813137 [patent_app_country] => US [patent_app_date] => 2015-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 7 [patent_no_of_words] => 3077 [patent_no_of_claims] => 15 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 159 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813137 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11425136 [patent_doc_number] => 20170033282 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-02-02 [patent_title] => 'Physical Cleaning with In-situ Dielectric Encapsulation Layer for Spintronic Device Application' [patent_app_type] => utility [patent_app_number] => 14/813854 [patent_app_country] => US [patent_app_date] => 2015-07-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 5 [patent_figures_cnt] => 5 [patent_no_of_words] => 1897 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14813854 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13921333 [patent_doc_number] => 10204790 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2019-02-12 [patent_title] => Methods for thin film deposition [patent_app_type] => utility [patent_app_number] => 14/811370 [patent_app_country] => US [patent_app_date] => 2015-07-28 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 29 [patent_figures_cnt] => 40 [patent_no_of_words] => 25548 [patent_no_of_claims] => 23 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 302 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14811370 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 13131795 [patent_doc_number] => 10083836 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2018-09-25 [patent_title] => Formation of boron-doped titanium metal films with high work function [patent_app_type] => utility [patent_app_number] => 14/808979 [patent_app_country] => US [patent_app_date] => 2015-07-24 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 2134 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 133 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14808979 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11063642 [patent_doc_number] => 20160260604 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2016-09-08 [patent_title] => 'PREPARATION METHOD OF GRAPHENE NANORIBBON ON h-BN' [patent_app_type] => utility [patent_app_number] => 14/803371 [patent_app_country] => US [patent_app_date] => 2015-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 4 [patent_no_of_words] => 4735 [patent_no_of_claims] => 16 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14803371 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10433221 [patent_doc_number] => 20150318233 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2015-11-05 [patent_title] => 'DC-DC CONVERTER HAVING TERMINALS OF SEMICONDUCTOR CHIPS DIRECTLY ATTACHABLE TO CIRCUIT BOARD' [patent_app_type] => utility [patent_app_number] => 14/800903 [patent_app_country] => US [patent_app_date] => 2015-07-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 8 [patent_figures_cnt] => 8 [patent_no_of_words] => 5312 [patent_no_of_claims] => 13 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14800903 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 10584012 [patent_doc_number] => 09306141 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-04-05 [patent_title] => 'Method for manufacturing semiconductor light emitting device' [patent_app_type] => utility [patent_app_number] => 14/788213 [patent_app_country] => US [patent_app_date] => 2015-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 19 [patent_no_of_words] => 5452 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 186 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14788213 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11694371 [patent_doc_number] => 20170170088 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2017-06-15 [patent_title] => 'TWO MATERIAL HIGH K THERMAL ENCAPSULANT SYSTEM' [patent_app_type] => utility [patent_app_number] => 15/037851 [patent_app_country] => US [patent_app_date] => 2015-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 7 [patent_figures_cnt] => 7 [patent_no_of_words] => 5587 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 4 [patent_words_short_claim] => 0 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 15037851 [rel_patent_id] =>[rel_patent_doc_number] =>)

Array ( [id] => 11221564 [patent_doc_number] => 09449907 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2016-09-20 [patent_title] => 'Stacked semiconductor chips packaging' [patent_app_type] => utility [patent_app_number] => 14/737716 [patent_app_country] => US [patent_app_date] => 2015-06-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 6 [patent_figures_cnt] => 15 [patent_no_of_words] => 4681 [patent_no_of_claims] => 11 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 119 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 14737716 [rel_patent_id] =>[rel_patent_doc_number] =>)