Search

Alexander G. Ghyka

Examiner (ID: 18931, Phone: (571)272-1669 , Office: P/2812 )

Most Active Art Unit
2812
Art Unit(s)
1754, 1106, 2812, 2899, 1105
Total Applications
3052
Issued Applications
2465
Pending Applications
254
Abandoned Applications
366

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 18653333 [patent_doc_number] => 20230299173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-21 [patent_title] => FORMING AN ELECTRONIC DEVICE, SUCH AS A JBS OR MPS DIODE, BASED ON 3C-SIC, AND 3C-SIC ELECTRONIC DEVICE [patent_app_type] => utility [patent_app_number] => 18/180680 [patent_app_country] => US [patent_app_date] => 2023-03-08 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 5301 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18180680 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/180680
Forming an electronic device, such as a JBS or MPS diode, based on 3C-SiC, and 3C-SiC electronic device Mar 7, 2023 Issued
Array ( [id] => 20268653 [patent_doc_number] => 12439665 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-10-07 [patent_title] => Semiconductor device, method for manufacturing semiconductor device, and electronic device [patent_app_type] => utility [patent_app_number] => 18/177399 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 17 [patent_no_of_words] => 8082 [patent_no_of_claims] => 9 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 212 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18177399 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/177399
Semiconductor device, method for manufacturing semiconductor device, and electronic device Mar 1, 2023 Issued
Array ( [id] => 18927165 [patent_doc_number] => 20240030169 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-25 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/116414 [patent_app_country] => US [patent_app_date] => 2023-03-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 15757 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18116414 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/116414
Semiconductor device and method of fabricating the same Mar 1, 2023 Issued
Array ( [id] => 18600127 [patent_doc_number] => 20230274928 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-31 [patent_title] => METHOD FOR MANUFACTURING A CARRIER SUBSTRATE ON A SEMICONDUCTOR WAFER AND DEVICE INCLUDING A SEMICONDUCTOR WAFER [patent_app_type] => utility [patent_app_number] => 18/173526 [patent_app_country] => US [patent_app_date] => 2023-02-23 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 2625 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18173526 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/173526
METHOD FOR MANUFACTURING A CARRIER SUBSTRATE ON A SEMICONDUCTOR WAFER AND DEVICE INCLUDING A SEMICONDUCTOR WAFER Feb 22, 2023 Pending
Array ( [id] => 19321638 [patent_doc_number] => 20240243185 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-18 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF FORMING THE SAME [patent_app_type] => utility [patent_app_number] => 18/171293 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4793 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 116 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18171293 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/171293
Semiconductor device and method of forming the same Feb 16, 2023 Issued
Array ( [id] => 19146269 [patent_doc_number] => 20240145298 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-02 [patent_title] => DOPING FREE CONNECTION STRUCTURES AND METHODS [patent_app_type] => utility [patent_app_number] => 18/170785 [patent_app_country] => US [patent_app_date] => 2023-02-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4765 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 47 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18170785 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/170785
DOPING FREE CONNECTION STRUCTURES AND METHODS Feb 16, 2023 Pending
Array ( [id] => 19392712 [patent_doc_number] => 20240282582 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-22 [patent_title] => METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/110778 [patent_app_country] => US [patent_app_date] => 2023-02-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11342 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18110778 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/110778
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE Feb 15, 2023 Pending
Array ( [id] => 18975332 [patent_doc_number] => 20240055424 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-02-15 [patent_title] => NANOSHEET DEVICES AND METHODS OF FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 18/165639 [patent_app_country] => US [patent_app_date] => 2023-02-07 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8147 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 54 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18165639 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/165639
Nanosheet devices and methods of fabricating the same Feb 6, 2023 Issued
Array ( [id] => 19349428 [patent_doc_number] => 20240258392 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-01 [patent_title] => SEMICONDUCTOR DEVICE AND MANUFACTURE METHOD [patent_app_type] => utility [patent_app_number] => 18/162685 [patent_app_country] => US [patent_app_date] => 2023-01-31 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3947 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -18 [patent_words_short_claim] => 86 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18162685 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/162685
Semiconductor device and manufacture method Jan 30, 2023 Issued
Array ( [id] => 19191310 [patent_doc_number] => 20240170223 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-05-23 [patent_title] => CAPACITOR STRUCTURE, SEMICONDUCTOR STRUCTURE, AND METHOD FOR MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/155761 [patent_app_country] => US [patent_app_date] => 2023-01-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10971 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 142 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155761 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/155761
Capacitor structure, semiconductor structure, and method for manufacturing the same Jan 17, 2023 Issued
Array ( [id] => 18409022 [patent_doc_number] => 20230170375 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-06-01 [patent_title] => IMAGE SENSOR COMPRISING ENTANGLED PIXEL [patent_app_type] => utility [patent_app_number] => 18/155419 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14134 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 190 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155419 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/155419
Image sensor comprising entangled pixel Jan 16, 2023 Issued
Array ( [id] => 20979651 [patent_doc_number] => 12740381 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-09-15 [patent_title] => Method for stacking multi-layer wafers, and system for stacking mult-layer wafers [patent_app_type] => utility [patent_app_number] => 18/155712 [patent_app_country] => US [patent_app_date] => 2023-01-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 3 [patent_figures_cnt] => 9 [patent_no_of_words] => 1117 [patent_no_of_claims] => 18 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 173 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18155712 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/155712
METHOD FOR STACKING MULTI-LAYER WAFERS, AND SYSTEM FOR STACKING MULT-LAYER WAFERS Jan 16, 2023 Pending
Array ( [id] => 19071036 [patent_doc_number] => 20240105462 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-28 [patent_title] => FORMATION OF SELF-ASSEMBLED MONOLAYER FOR SELECTIVE ETCHING PROCESS [patent_app_type] => utility [patent_app_number] => 18/153556 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8105 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 199 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153556 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153556
Formation of self-assembled monolayer for selective etching process Jan 11, 2023 Issued
Array ( [id] => 18789403 [patent_doc_number] => 20230378064 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-23 [patent_title] => SEMICONDUCTOR STRUCTURE, TEST STRUCTURE, MANUFACTURING METHOD AND TEST METHOD [patent_app_type] => utility [patent_app_number] => 18/153396 [patent_app_country] => US [patent_app_date] => 2023-01-12 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6606 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 96 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18153396 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/153396
Semiconductor structure, test structure, manufacturing method and test method Jan 11, 2023 Issued
Array ( [id] => 19038132 [patent_doc_number] => 20240087947 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-03-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING [patent_app_type] => utility [patent_app_number] => 18/152477 [patent_app_country] => US [patent_app_date] => 2023-01-10 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10790 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18152477 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/152477
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING Jan 9, 2023 Pending
Array ( [id] => 18757560 [patent_doc_number] => 20230361023 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-11-09 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING A POROUS DIELECTRIC LAYER, AND METHOD OF FORMING THE SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/093540 [patent_app_country] => US [patent_app_date] => 2023-01-05 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 4984 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 2 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18093540 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/093540
Semiconductor device including a porous dielectric layer, and method of forming the semiconductor device Jan 4, 2023 Issued
Array ( [id] => 18555250 [patent_doc_number] => 20230253267 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-08-10 [patent_title] => SEMICONDUCTOR DEVICE INCLUDING A MACRO PATTERN STRUCTURE FOR MONITORING OF LINE WIDTHS [patent_app_type] => utility [patent_app_number] => 18/149974 [patent_app_country] => US [patent_app_date] => 2023-01-04 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 10222 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 120 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18149974 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/149974
Semiconductor device including a macro pattern structure for monitoring of line widths Jan 3, 2023 Issued
Array ( [id] => 18688352 [patent_doc_number] => 11784095 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2023-10-10 [patent_title] => Fabrication of a vertical fin field effect transistor with reduced dimensional variations [patent_app_type] => utility [patent_app_number] => 18/087697 [patent_app_country] => US [patent_app_date] => 2022-12-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 11 [patent_figures_cnt] => 20 [patent_no_of_words] => 9360 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 102 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18087697 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/087697
Fabrication of a vertical fin field effect transistor with reduced dimensional variations Dec 21, 2022 Issued
Array ( [id] => 18834041 [patent_doc_number] => 20230402568 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-14 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME [patent_app_type] => utility [patent_app_number] => 18/085480 [patent_app_country] => US [patent_app_date] => 2022-12-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7905 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -13 [patent_words_short_claim] => 64 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18085480 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/085480
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Dec 19, 2022 Abandoned
Array ( [id] => 20776579 [patent_doc_number] => 12660271 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2026-06-16 [patent_title] => Method of reducing metal gate resistance for next generation NMOS device application [patent_app_type] => utility [patent_app_number] => 18/067979 [patent_app_country] => US [patent_app_date] => 2022-12-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 4 [patent_figures_cnt] => 16 [patent_no_of_words] => 5917 [patent_no_of_claims] => 14 [patent_no_of_ind_claims] => 1 [patent_words_short_claim] => 162 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18067979 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/067979
Method of reducing metal gate resistance for next generation NMOS device application Dec 18, 2022 Issued
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