Search

Alexander Gee

Examiner (ID: 14165, Phone: (571)270-5955 , Office: P/2425 )

Most Active Art Unit
2425
Art Unit(s)
2425
Total Applications
415
Issued Applications
295
Pending Applications
0
Abandoned Applications
123

Applications

Application numberTitle of the applicationFiling DateStatus
Array ( [id] => 19016486 [patent_doc_number] => 11923431 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Bipolar junction transistors including emitter-base and base-collector superlattices [patent_app_type] => utility [patent_app_number] => 17/873426 [patent_app_country] => US [patent_app_date] => 2022-07-26 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 13 [patent_figures_cnt] => 14 [patent_no_of_words] => 5647 [patent_no_of_claims] => 8 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 97 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17873426 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/873426
Bipolar junction transistors including emitter-base and base-collector superlattices Jul 25, 2022 Issued
Array ( [id] => 17993241 [patent_doc_number] => 20220359278 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-11-10 [patent_title] => BARRIER STRUCTURE FOR SEMICONDUCTOR DEVICE [patent_app_type] => utility [patent_app_number] => 17/871179 [patent_app_country] => US [patent_app_date] => 2022-07-22 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 7693 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 151 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17871179 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/871179
Barrier structure for semiconductor device Jul 21, 2022 Issued
Array ( [id] => 19335729 [patent_doc_number] => 20240250159 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-07-25 [patent_title] => INSULATED GATE BIPOLAR TRANSISTOR DEVICE [patent_app_type] => utility [patent_app_number] => 18/016919 [patent_app_country] => US [patent_app_date] => 2022-07-21 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 1694 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -5 [patent_words_short_claim] => 266 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18016919 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/016919
Insulated gate bipolar transistor device Jul 20, 2022 Issued
Array ( [id] => 18126267 [patent_doc_number] => 20230011887 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-01-12 [patent_title] => LIGHT-EMITTING DIODE AND LIGHT-EMITTING MODULE [patent_app_type] => utility [patent_app_number] => 17/868995 [patent_app_country] => US [patent_app_date] => 2022-07-20 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 11703 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -14 [patent_words_short_claim] => 166 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868995 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868995
Light-emitting diode and light-emitting module Jul 19, 2022 Issued
Array ( [id] => 18849085 [patent_doc_number] => 20230411489 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-12-21 [patent_title] => SEMICONDUCTOR DEVICE AND METHOD FOR FABRICATING THE SAME [patent_app_type] => utility [patent_app_number] => 17/868753 [patent_app_country] => US [patent_app_date] => 2022-07-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3387 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -10 [patent_words_short_claim] => 60 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17868753 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/868753
Semiconductor device and method for fabricating the same Jul 18, 2022 Issued
Array ( [id] => 18883137 [patent_doc_number] => 20240006506 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => LOW-RESISTANCE AND THERMALLY STABLE CONTACTS WITH PHOSPHIDE OR ARSENIDE METAL COMPOUND LAYERS [patent_app_type] => utility [patent_app_number] => 17/856979 [patent_app_country] => US [patent_app_date] => 2022-07-02 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 18152 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856979 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856979
Low-resistance and thermally stable contacts with phosphide or arsenide metal compound layers Jul 1, 2022 Issued
Array ( [id] => 18884890 [patent_doc_number] => 20240008259 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY WITH STACKED SEMICONDUCTOR STRUCTURES [patent_app_type] => utility [patent_app_number] => 17/856868 [patent_app_country] => US [patent_app_date] => 2022-07-01 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 14155 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -19 [patent_words_short_claim] => 83 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17856868 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/856868
Three-dimensional dynamic random access memory with stacked semiconductor structures Jun 30, 2022 Issued
Array ( [id] => 18884884 [patent_doc_number] => 20240008253 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-01-04 [patent_title] => INTEGRATED CIRCUIT STRUCTURES HAVING MEMORY ACCESS TRANSISTOR WITH BACKSIDE CONTACT [patent_app_type] => utility [patent_app_number] => 17/855545 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 17890 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -16 [patent_words_short_claim] => 49 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17855545 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/855545
Integrated circuit structures having memory access transistor with backside contact Jun 29, 2022 Issued
Array ( [id] => 17949337 [patent_doc_number] => 20220336356 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => Semiconductor Device and Method of Manufacture [patent_app_type] => utility [patent_app_number] => 17/854683 [patent_app_country] => US [patent_app_date] => 2022-06-30 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 8237 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 78 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17854683 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/854683
Semiconductor device and method of manufacture Jun 29, 2022 Issued
Array ( [id] => 19016512 [patent_doc_number] => 11923457 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => FinFET structure with fin top hard mask and method of forming the same [patent_app_type] => utility [patent_app_number] => 17/850251 [patent_app_country] => US [patent_app_date] => 2022-06-27 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 34 [patent_no_of_words] => 9302 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 150 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17850251 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/850251
FinFET structure with fin top hard mask and method of forming the same Jun 26, 2022 Issued
Array ( [id] => 17917707 [patent_doc_number] => 20220320103 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-06 [patent_title] => VERTICAL DIGIT LINES FOR SEMICONDUCTOR DEVICES [patent_app_type] => utility [patent_app_number] => 17/843662 [patent_app_country] => US [patent_app_date] => 2022-06-17 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 26585 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 124 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17843662 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/843662
Vertical digit lines for semiconductor devices Jun 16, 2022 Issued
Array ( [id] => 19407302 [patent_doc_number] => 20240290813 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2024-08-29 [patent_title] => OPTICAL DETECTION DEVICE, MANUFACTURING METHOD OF OPTICAL DETECTION DEVICE, AND ELECTRONIC APPARATUS [patent_app_type] => utility [patent_app_number] => 18/568439 [patent_app_country] => US [patent_app_date] => 2022-06-16 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 103990 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -59 [patent_words_short_claim] => 106 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 18568439 [rel_patent_id] =>[rel_patent_doc_number] =>)
18/568439
OPTICAL DETECTION DEVICE, MANUFACTURING METHOD OF OPTICAL DETECTION DEVICE, AND ELECTRONIC APPARATUS Jun 15, 2022 Pending
Array ( [id] => 19330444 [patent_doc_number] => 12048144 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-07-23 [patent_title] => Semiconductor memory device [patent_app_type] => utility [patent_app_number] => 17/839593 [patent_app_country] => US [patent_app_date] => 2022-06-14 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 14 [patent_figures_cnt] => 14 [patent_no_of_words] => 8999 [patent_no_of_claims] => 21 [patent_no_of_ind_claims] => 2 [patent_words_short_claim] => 110 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17839593 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/839593
Semiconductor memory device Jun 13, 2022 Issued
Array ( [id] => 18224533 [patent_doc_number] => 20230063527 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-03-02 [patent_title] => GATE STRUCTURES AND SEMICONDUCTOR DEVICES INCLUDING THE SAME [patent_app_type] => utility [patent_app_number] => 17/747238 [patent_app_country] => US [patent_app_date] => 2022-05-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 6657 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 66 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17747238 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/747238
Gate structures and semiconductor devices including the same May 17, 2022 Issued
Array ( [id] => 17833869 [patent_doc_number] => 20220271173 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-08-25 [patent_title] => FORMATION METHOD OF SEMICONDUCTOR DEVICE WITH ISOLATION STRUCTURE [patent_app_type] => utility [patent_app_number] => 17/739450 [patent_app_country] => US [patent_app_date] => 2022-05-09 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9272 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 71 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17739450 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/739450
Formation method of semiconductor device with isolation structure May 8, 2022 Issued
Array ( [id] => 17949292 [patent_doc_number] => 20220336311 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2022-10-20 [patent_title] => POWER MODULE [patent_app_type] => utility [patent_app_number] => 17/660423 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 24494 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 234 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17660423 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/660423
Power module Apr 24, 2022 Issued
Array ( [id] => 19016253 [patent_doc_number] => 11923194 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2024-03-05 [patent_title] => Epitaxial blocking layer for multi-gate devices and fabrication methods thereof [patent_app_type] => utility [patent_app_number] => 17/728369 [patent_app_country] => US [patent_app_date] => 2022-04-25 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 22 [patent_figures_cnt] => 28 [patent_no_of_words] => 8364 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 109 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17728369 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/728369
Epitaxial blocking layer for multi-gate devices and fabrication methods thereof Apr 24, 2022 Issued
Array ( [id] => 18712851 [patent_doc_number] => 20230335484 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-10-19 [patent_title] => LOCAL INTERCONNECT POWER RAILS AND UPPER POWER RAILS [patent_app_type] => utility [patent_app_number] => 17/723888 [patent_app_country] => US [patent_app_date] => 2022-04-19 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 3213 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -17 [patent_words_short_claim] => 45 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723888 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723888
Local interconnect power rails and upper power rails Apr 18, 2022 Issued
Array ( [id] => 18661510 [patent_doc_number] => 20230307524 [patent_country] => US [patent_kind] => A1 [patent_issue_date] => 2023-09-28 [patent_title] => HIGH VOLTAGE SEMICONDUCTOR DEVICE AND MANUFACTURING METHOD THEREOF [patent_app_type] => utility [patent_app_number] => 17/723438 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 0 [patent_figures_cnt] => 0 [patent_no_of_words] => 9062 [patent_no_of_claims] => 0 [patent_no_of_ind_claims] => -23 [patent_words_short_claim] => 140 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => publication [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723438 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723438
High voltage semiconductor device and manufacturing method thereof Apr 17, 2022 Issued
Array ( [id] => 19705039 [patent_doc_number] => 12199086 [patent_country] => US [patent_kind] => B2 [patent_issue_date] => 2025-01-14 [patent_title] => Stack-gate circuit [patent_app_type] => utility [patent_app_number] => 17/723367 [patent_app_country] => US [patent_app_date] => 2022-04-18 [patent_effective_date] => 0000-00-00 [patent_drawing_sheets_cnt] => 18 [patent_figures_cnt] => 20 [patent_no_of_words] => 9119 [patent_no_of_claims] => 20 [patent_no_of_ind_claims] => 3 [patent_words_short_claim] => 198 [patent_maintenance] => 1 [patent_no_of_assignments] => 0 [patent_current_assignee] =>[type] => patent [pdf_file] =>[firstpage_image] =>[orig_patent_app_number] => 17723367 [rel_patent_id] =>[rel_patent_doc_number] =>)
17/723367
Stack-gate circuit Apr 17, 2022 Issued
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